STM32F102CBT6TR STMicroelectronics, STM32F102CBT6TR Datasheet - Page 28

• Manufacturer Part Number: STM32F102CBT6TR
• Description: MCU 32BIT ARM 128K FLASH 48-LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F102CBT6TR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: STM32F102x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 6
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 10 Channel
• For Use With: 497-10030 - STARTER KIT FOR STM32497-6438 - BOARD EVALUTION FOR STM32 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
5.3.3
5.3.4
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Embedded reset and power control block characteristics
The parameters given in
temperature and V
Table 10.
1. The product behavior is guaranteed by design down to the minimum V
2. Guaranteed by design, not tested in production.
Embedded reference voltage
The parameters given in
temperature and V
t
.
RSTTEMPO
V
V
V
Symbol
PVDhyst
POR/PDR
PDRhyst
V
PVD
(2)
(2)
Embedded reset and power control block characteristics
Programmable voltage
detector level selection
PVD hysteresis
Power on/power down
reset threshold
PDR hysteresis
Reset temporization
DD
DD
Parameter
supply voltage conditions summarized in
supply voltage conditions summarized in
Table 10
Table 11
Doc ID 15056 Rev 3
are derived from tests performed under ambient
are derived from tests performed under ambient
PLS[2:0]=000 (rising edge)
PLS[2:0]=000 (falling edge)
PLS[2:0]=001 (rising edge)
PLS[2:0]=001 (falling edge)
PLS[2:0]=010 (rising edge)
PLS[2:0]=010 (falling edge)
PLS[2:0]=011 (rising edge)
PLS[2:0]=011 (falling edge)
PLS[2:0]=100 (rising edge)
PLS[2:0]=100 (falling edge)
PLS[2:0]=101 (rising edge)
PLS[2:0]=101 (falling edge)
PLS[2:0]=110 (rising edge)
PLS[2:0]=110 (falling edge)
PLS[2:0]=111 (rising edge)
PLS[2:0]=111 (falling edge)
Falling edge
Rising edge
Conditions
POR/PDR
STM32F102x8, STM32F102xB
Table
Table
1.8
2.19
2.09
2.28
2.18
2.38
2.28
2.47
2.37
2.57
2.47
2.66
2.56
2.76
2.66
1.84
value.
Min
1.5
2.1
2
(1)
8.
8.
2.18
2.08
2.28
2.18
2.38
2.28
2.48
2.38
2.58
2.48
2.68
2.58
2.78
2.68
2.88
2.78
1.88
1.92
Typ
100
2.5
40
Max
2.26
2.16
2.37
2.27
2.48
2.38
2.58
2.48
2.69
2.59
2.79
2.69
1.96
2.9
2.8
2.9
2.0
4.5
3
Unit
mV
mV
ms
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V