ST7FMC1K4T6 STMicroelectronics, ST7FMC1K4T6 Datasheet - Page 216

MCU 8BIT 16K FLASH 32TQFP

ST7FMC1K4T6

Manufacturer Part Number
ST7FMC1K4T6
Description
MCU 8BIT 16K FLASH 32TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FMC1K4T6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
ST7FMC1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
60
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4866

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ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
MOTOR D EVENT FILTER REGISTER (MDFR)
Read/Write
Reset Value: 0000 1111 (0Fh)
Bits 7:4 = DEF[3:0]: D Event Filter bits
These bits select the number of valid consecutive
D events (when the D event is detected) needed to
generate the active event. Sampling is done at the
selected f
Table 69. D Event filter Setting
216/309
DEF3 DEF2 DEF1 DEF0
DEF3
7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
DEF2
6
SCF
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
DEF1
frequency, see
5
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
DEF0 DWF3 DWF2 DWF1 DWF0
4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3
Table
Samples
D event
10
11
12
13
14
15
16
2
1
2
3
4
5
6
7
8
9
82.
1
SR=1
0
Bit 3:0 = DWF[3:0]: D Window Filter bits
These bits select the length of the blanking win-
dow activated at each C event. The filter blanks
the D event detection.
Table 70. D Window Filter setting
Note: Times are indicated for 4 MHz f
DWF3 DWF2 DWF1 DWF0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
mode (SR=0)
Sensorless
Window
Filter in
C to D
100µs
120µs
140µs
160µs
180µs
200µs
10µs
15µs
20µs
25µs
30µs
35µs
40µs
60µs
80µs
5µs
PERIPH
SR=1

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