Z8F0422PJ020EG Zilog, Z8F0422PJ020EG Datasheet - Page 94

• Manufacturer Part Number: Z8F0422PJ020EG
• Description: IC ENCORE MCU FLASH 4K 28DIP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0422PJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Processor Series: Z8F042xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4140; Z8F0422PJ020EG

Table 46. Timer 0–1 Control Register (TxCTL)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
Timer 0–1 Control 1 Registers
TEN
7
The Timer 0–1 Control (TxCTL) registers enable/disable the timers, set the prescaler
value, and determine the timer operating mode.
TEN—Timer Enable
0 = Timer is disabled.
1 = Timer enabled to count.
TPOL—Timer Input/Output Polarity
Operation of this bit is a function of the current operating mode of the timer.
ONE-SHOT Mode
When the timer is disabled, the Timer Output signal is set to the value of this bit.
When the timer is enabled, the Timer Output signal is complemented upon timer Reload.
CONTINUOUS Mode
When the timer is disabled, the Timer Output signal is set to the value of this bit. When the
timer is enabled, the Timer Output signal is complemented upon timer Reload.
COUNTER Mode
If the timer is enabled the Timer Output signal is complemented after timer reload.
0 = Count occurs on the rising edge of the Timer Input signal.
1 = Count occurs on the falling edge of the Timer Input signal.
PWM Mode
0 = Timer Output is forced Low (0) when the timer is disabled. When enabled,
1 = Timer Output is forced High (1) when the timer is disabled. When enabled,
CAPTURE Mode
0 = Count is captured on the rising edge of the Timer Input signal.
1 = Count is captured on the falling edge of the Timer Input signal.
the Timer Output is forced High (1) upon PWM count match and forced
Low (0) upon Reload.
the Timer Output is forced Low (0) upon PWM count match and forced
High (1) upon Reload.
TPOL
6
5
PRES
4
F07H, F0FH
R/W
0
3
Z8 Encore! XP
2
Product Specification
TMODE
1
®
F0822 Series
0
Timers
81