Z8F0422PJ020EG Zilog, Z8F0422PJ020EG Datasheet - Page 70

• Manufacturer Part Number: Z8F0422PJ020EG
• Description: IC ENCORE MCU FLASH 4K 28DIP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0422PJ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Processor Series: Z8F042xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4140; Z8F0422PJ020EG

Interrupt Controller
Interrupt Vector Listing
PS022517-0508
The interrupt controller on Z8 Encore! XP
requests from the on-chip peripherals and the GPIO port pins. The features of the interrupt
controller include the following:
•
•
•
•
Interrupt Requests (IRQs) allow peripheral devices to suspend CPU operation in an
orderly manner and force the CPU to start an Interrupt Service Routine (ISR). Usually this
ISR is involved with the exchange of data, status information, or control information
between the CPU and the interrupting peripheral. When the service routine is
completed, the CPU returns to the operation from which it was interrupted.
The eZ8 CPU supports both vectored and polled interrupt handling. For polled interrupts,
the interrupt control has no effect on operation. For more information on interrupt servic-
ing, refer to eZ8 CPU Core User Manual (UM0128) available for download at
www.zilog.com.
Table 24
with the most significant byte (MSB) at the even Program Memory address and the least
significant byte (LSB) at the following odd Program Memory address.
Table 24. Interrupt Vectors in Order of Priority
Priority
Highest
19 unique interrupt vectors:
Flexible GPIO interrupts:
Three levels of individually programmable interrupt priority.
WDT is configured to generate an interrupt.
– 12 GPIO port pin interrupt sources.
– 7 On-chip peripheral interrupt sources.
– 8 selectable rising and falling edge GPIO interrupts.
– 4 dual-edge interrupts.
lists all the interrupts available in order of priority. The interrupt vector is stored
Program Memory
Vector Address
0002H
0004H
0006H
Interrupt Source
Reset (not an interrupt)
WDT (see
Illegal Instruction Trap (not an interrupt)
®
F0822 Series products prioritizes the interrupt
Watchdog Timer
Z8 Encore! XP
Product Specification
on page 83)
®
Interrupt Controller
F0822 Series
57