ST7FLITE20F1B6 STMicroelectronics, ST7FLITE20F1B6 Datasheet - Page 153

IC MCU 8BIT 8K FLASH 20-DIP

ST7FLITE20F1B6

Manufacturer Part Number
ST7FLITE20F1B6
Description
IC MCU 8BIT 8K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheets

Specifications of ST7FLITE20F1B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5517 - EVAL BOARD 1PHASE ENERGY METER497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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0
Table 102. LT_Disable
Function Name
Function Prototype
Behaviour Description
Input Parameter
Output Parameters
Required Preconditions
Functions called
Postconditions
See also
1) Present in ST7FLITE0 and ST7SUPERLITE.
2) Present in ST7FLITE1/2/3 and ST7FDALI.
LT_Disable
Void LT_Disable(Lt_Disable_Param DValue)
Disables input capture interrupt or Timebase interrupt or
watchdog or all of these depending upon the input param-
eter passed. More than one parameter can be passed by
logically ORing them together.
LT_ICAP_IT_DISABLE
disables input capture interrupt
LT_TB_IT_DISABLE
disables Timebase interrupt
LT_TB1_IT_DISABLE
disables Timebase1 interrupt
LT_TB2_IT_DISABLE
disables Timebase2 interrupt
LT_WDG_DISABLE
disables watchdog
None
None
Input capture interrupt or Timebase interrupt or watchdog
disabled depending upon the input parameter passed.
LT_Init
Interrupts or watchdog enabled
1)
1)
2)
2)
Function Descriptions
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