ST7FLITE35F2B6 STMicroelectronics, ST7FLITE35F2B6 Datasheet - Page 170

IC MCU 8BIT 8K FLASH 20DIP

ST7FLITE35F2B6

Manufacturer Part Number
ST7FLITE35F2B6
Description
IC MCU 8BIT 8K FLASH 20DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheets

Specifications of ST7FLITE35F2B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
LINSCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5085 - EVAL BOARD UNIV MOTOR CONTROL497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
ST7LITE3xF2
IMPORTANT NOTES (Cont’d)
Impact on application
Software may execute the interrupt routine twice
after header reception.
Moreover, in reception mode, as the receiver is no
longer in mute mode, an interrupt will be generat-
ed on each data byte reception.
Figure 110. LINSCI Interrupt routine
170/173
@interrupt void LINSCI_IT ( void ) /* LINSCI interrupt routine */
{
}
/* clear flags */
SCISR_buffer = SCISR;
SCIDR_buffer = SCIDR;
if ( SCISR_buffer & LHE )/* header error ? */
{
}
if (!LHLR)/* header time-out? */
{
}
{
}
if ( !(SCICR2 & RWU) )/* active mode ? */
SCISR;
SCIDR;/* Clear RDRF flag */
SCICR2 |= RWU;/* set mute mode */
SCISR;
SCIDR;/* Clear RDRF flag */
SCICR2 |= RWU;/* set mute mode */
_asm("rim");/* enable interrupts */
_asm("sim");/* disable interrupts */
Workaround
The problem can be detected in the LINSCI inter-
rupt routine. In case of timeout error (LHE is set
and LHLR is loaded with 00h), the software can
check the RWU bit in the SCICR2 register. If RWU
is cleared, it can be set by software. Refer to
ure
110. Workaround is shown in bold characters.
Example using Cosmic compiler syntax
Fig-

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