Z8F0412SJ020SG Zilog, Z8F0412SJ020SG Datasheet - Page 113

• Manufacturer Part Number: Z8F0412SJ020SG
• Description: IC ENCORE MCU FLASH 4K 28SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0412SJ020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: Z8F041xx
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4107; Z8F0412SJ020SG

Table 52. UART Transmit Data Register (U0TXD)
UART Control Register Definitions
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
UART Transmit Data Register
W
7
X
When the UART is disabled, the BRG functions as a basic 16-bit timer with interrupt on
time-out. Follow the steps below to configure the BRG as a timer with interrupt on time-
out:
1. Disable the UART by clearing the
2. Load the desired 16-bit count value into the UART Baud Rate High and Low Byte
3. Enable the BRG timer function and associated interrupt by setting the BKGCTL bit in
When configured as a general-purpose timer, the interrupt interval is calculated using the
following equation:
The UART Control Registers support the UART and the associated Infrared Encoder/
Decoders. See
red operation.
Data bytes written to the UART Transmit Data Register
TXDx pin. The Write-only UART Transmit Data Register shares a Register File address
with the Read-only UART Receive Data Register.
TXD—Transmit Data
UART transmitter data byte to be shifted out through the TXDx pin.
Interrupt Interval (s) = System Clock Period (s) ×BRG[15:0] ]
to 0.
Registers.
the UART Control 1 Register to 1.
W
X
6
Infrared Encoder/Decoder
W
X
5
W
X
4
REN
F40H
TXD
on page 109 for more information on the infra-
and
W
X
3
TEN
Universal Asynchronous Receiver/Transmitter
bits in the UART Control 0 Register
Z8 Encore! XP
(Table
W
X
2
52) are shifted out on the
Product Specification
W
X
1
®
F0822 Series
W
X
0
100