ST7FLIT19BF0B6 STMicroelectronics, ST7FLIT19BF0B6 Datasheet - Page 135
![IC MCU 8BIT 2K FLASH 20-DIP](/photos/6/89/68911/497-20-dip__300_mil__narrow_pdip_mdip__series_sml.jpg)
ST7FLIT19BF0B6
Manufacturer Part Number
ST7FLIT19BF0B6
Description
IC MCU 8BIT 2K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLIT15BY1M6.pdf
(159 pages)
Specifications of ST7FLIT19BF0B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLIT1x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLIT1B-D/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 7 Channel
For Use With
497-6232 - BOARD EVAL ST7LITE1B,STP5NK60Z497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.9 CONTROL PIN CHARACTERISTICS
13.9.1 Asynchronous RESET Pin
T
Notes:
1. Data based on characterization results, not tested in production.
2. The I
(I/O ports and control pins) must not exceed I
3. The R
V
4. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on
RESET pin with a duration below t
t
w(RSTL)out
t
t
Symbol
ILmax
A
h(RSTL)in
g(RSTL)in
R
V
= -40°C to 125°C, unless otherwise specified
V
V
V
hys
ON
OL
IH
IL
and V
IO
ON
current sunk must always respect the absolute maximum rating specified in
pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin between
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
Pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
DD
Parameter
h(RSTL)in
1)
1)
1)2)
3)
4)
can be ignored.
VSS
1)
.
V
V
V
Internal reset sources
DD
DD
DD
=5V
=5V
=3V
1)
Conditions
I
I
IO
IO
=+5mA T
=+2mA T
A
A
≤85°C
≤85°C
Section 13.2.2
0.7xV
V
ss
Min
20
40
20
- 0.3
DD
Typ
0.5
0.2
200
40
70
30
2
and the sum of I
ST7LITE1xB
V
0.3xV
DD
Max
120
1.0
0.4
80
+ 0.3
DD
135/159
Unit
kΩ
μs
μs
ns
V
V
V
IO
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