EP9312-IB Cirrus Logic Inc, EP9312-IB Datasheet - Page 9

IC ARM920T MCU 200MHZ 352-PBGA

EP9312-IB

Manufacturer Part Number
EP9312-IB
Description
IC ARM920T MCU 200MHZ 352-PBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9312-IB

Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
352-BGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1259

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Triple-port USB Host
The USB Open Host Controller Interface (Open HCI)
provides full-speed serial communications ports at a
baud rate of 12 Mbits/sec. Up to 127 USB devices
(printer, mouse, camera, keyboard, etc.) and USB hubs
can be connected to the USB host in the USB “tiered
star” topology.
This includes the following features:
The Open HCI host controller initializes the master DMA
transfer with the AHB bus:
DS515PP7
TXD0
RXD0
CTSn
DSRn / DCDn
DTRn
RTSn
EGPIO[0] / RI
TXD1 / SIROUT
RXD1 / SIRIN
TXD2
RXD2
EGPIO[3] / TENn
Table I. Universal Asynchronous Receiver/Transmitters Pin
receive and a 16 byte FIFO for transmit. Interrupts are
generated on Rx, Tx and modem status change.
UART2 contains an IrDA encoder operating at either
the slow (up to 115 Kbps), medium (0.576 or 1.152
Mbps), or fast (4 Mbps) IR data rates. It also has a 16
byte FIFO for receive and a 16 byte FIFO for transmit.
UART3 supports HDLC and includes a 16 byte FIFO
for receive and a 16 byte FIFO for transmit. Interrupts
are generated on Rx and Tx.
Compliance with the USB 2.0 specification
Compliance with the Open HCI Rev 1.0 specification
Supports both low speed (1.5 Mbps) and full speed
(12 Mbps) USB device connections
Root HUB integrated with 3 downstream USB ports
Transceiver buffers integrated, over-current protection
on ports
Supports power management
Operates as a master on the bus
Pin Mnemonic
UART1 Transmit
UART1 Receive
UART1 Clear To Send /
Transmit Enable
UART1 Data Set Ready /
Data Carrier Detect
UART1 Data Terminal Ready
UART1 Ready To Send
UART1 Ring Indicator
UART2 Transmit /
IrDA Output
UART2 Receive / IrDA Input
UART3 Transmit
UART3 Receive
HDLC3 Transmit Enable
Assignments
Pin Name - Description
©
Copyright 2005 Cirrus Logic (All Rights Reserved)
Two-wire Interface
The two-wire interface provides communication and
control for synchronous-serial-driven devices.
Real-time Clock with Software Trim
The software trim feature on the real time clock (RTC)
provides software controlled digital compensation of the
32.768 KHz input clock. This compensation is accurate to
±
PLL and Clocking
The Processor and the Peripheral Clocks operate from a
single 14.7456 MHz crystal.
The Real Time Clock operates from a 32.768 KHz
external oscillator.
RTCXTALI
RTCXTALO
USBp[2:0]
USBm[2:0]
Table K. Two-Wire Port with EEPROM Support Pin Assignments
EECLK
EEDATA
Pin Mnemonic
1.24 sec/month.
Fetches endpoint descriptors and transfer descriptors
Accesses endpoint data from system memory
Accesses the HC communication area
Writes status and retire transfer descriptor
Note:
Pin Mnemonic
Pin Mnemonic
Table L. Real-Time Clock with Pin Assignments
Table J. Triple Port USB Host Pin Assignments
A real time clock must be connected to RTCXTALI or
the EP9312 device will not boot.
Two-wire Interface Clock
Two-wire Interface Data
Pin Name - Description
USB Positive signals
USB Negative Signals
Real-Time Clock Oscillator Input
Real-Time Clock Oscillator Output
Universal Platform SOC Processor
Pin Name - Description
Pin Name - Description
General
Purpose I/O
General
Purpose I/O
Alternative
Usage
EP9312
9

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