LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 317
LPC2468FET208,551
Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2468FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S
935283234551
LPC2468FET208-S
Available stocks
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Quantity
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Part Number:
LPC2468FET208,551
Manufacturer:
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Quantity:
6 174
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UM10237_4
User manual
7.16 Cursor Image registers (CRSR_IMG, RW - 0xFFE1 0800 to 0xFFE1
Each word location contains two palette entries. This means that 128 word locations are
used for the palette. When configured for little-endian byte ordering, bits [15:0] are the
lower numbered palette entry and [31:16] are the higher numbered palette entry. When
configured for big-endian byte ordering this is reversed, because bits [31:16] are the low
numbered palette entry and [15:0] are the high numbered entry.
Note: Only TFT displays use all of the palette entry bits.
The contents of the LCD_PAL register are described in
Table 274. Color Palette registers (LCD_PAL, RW - 0xFFE1 0200 to 0xFFE1 03FC)
0BFC)
The CRSR_IMG register area contains 256-word wide values which are used to define
the image or images overlaid on the display by the hardware cursor mechanism. The
image must always be stored in LBBP mode (little-endian byte, big-endian pixel) mode, as
described in Image format on page 2-19. Two bits are used to encode color and
transparency for each pixel in the cursor.
Depending on the state of bit 0 in the CRSR_CFG register (see Cursor Configuration
register description), the cursor image RAM contains either four 32x32 cursor images, or
a single 64x64 cursor image.
The two colors defined for the cursor are mapped onto values from the CRSR_PAL0 and
CRSR_PAL0 registers (see Cursor Palette register descriptions).
The contents of the CRSR_IMG register are described in
Bits
31
30:26
25:21
20:16
15
14:10
9:5
4:0
Function
I
B[4:0]
G[4:0]
R[4:0]
I
B[4:0]
G[4:0]
R[4:0]
Rev. 04 — 26 August 2009
Description
Intensity / unused bit.
Can be used as the LSB of the R, G, and B inputs to a 6:6:6 TFT
display, doubling the number of colors to 64K, where each color
has two different intensities.
Blue palette data.
Green palette data.
Red palette data.
For STN displays, only the four MSBs, bits [4:1], are used. For
monochrome displays only the red palette data is used. All of the
palette registers have the same bit fields.
Intensity / unused bit.
Can be used as the LSB of the R, G, and B inputs to a 6:6:6 TFT
display, doubling the number of colors to 64K, where each color
has two different intensities.
Blue palette data.
Green palette data.
Red palette data.
For STN displays, only the four MSBs, bits [4:1], are used. For
monochrome displays only the red palette data is used. All of the
palette registers have the same bit fields.
Chapter 12: LPC24XX LCD controller
Table
Table
12–274.
12–275.
UM10237
© NXP B.V. 2009. All rights reserved.
317 of 792
Reset
value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
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