P87C51RC2BN,112 NXP Semiconductors, P87C51RC2BN,112 Datasheet - Page 62

• Manufacturer Part Number: P87C51RC2BN,112
• Description: IC 80C51 MCU 512 RAM 40DIP
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C51RC2BN,112

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Cpu Family: 87C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 33MHz
• Interface Type: UART
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• For Use With: OM10064 - EMULATOR 80C51 PDS51-MK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935272150112; P87C51RC2BN; P87C51RC2BN

Philips Semiconductors
ROM CODE SUBMISSION FOR 64K ROM DEVICE (87C51RD2)
When submitting ROM code for the 64K ROM devices, the following must be specified:
1. 64 kbyte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
2003 Jan 24
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
ADDRESS
0000H to FFFFH
10000H to 1003FH
10040H
10040H
Security Bit #1:
Security Bit #2:
Encryption:
Enabled
Enabled
No
CONTENT
DATA
KEY
SEC
SEC
8KB/16KB/32KB/64KB OTP
Disabled
Disabled
Yes
If Yes, must send
62
BIT(S)
7:0
7:0
0
1
P87C51RA2/RB2/RC2/RD2
COMMENT
User ROM Data
ROM Encryption Key
FFH = no encryption
ROM Security Bit 1
0 = enable security
1 = disable security
ROM Security Bit 2
0 = enable security
1 = disable security
Product data