P87C51RC2BN,112 NXP Semiconductors, P87C51RC2BN,112 Datasheet - Page 44

• Manufacturer Part Number: P87C51RC2BN,112
• Description: IC 80C51 MCU 512 RAM 40DIP
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C51RC2BN,112

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Cpu Family: 87C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 33MHz
• Interface Type: UART
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• For Use With: OM10064 - EMULATOR 80C51 PDS51-MK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935272150112; P87C51RC2BN; P87C51RC2BN

1. Typical ratings are not guaranteed. Values listed are based on tests conducted on limited number of samples at room temperature.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the V
3. Capacitive loading on ports 0 and 2 may cause the V
4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
5. See Figures 43 through 46 for I
6. This value applies to T
7. Load capacitance for port 0, ALE, and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
8. Under steady state (non-transient) conditions, I
9. ALE is tested to V
10. Pin capacitance is characterized but not tested. Pin capacitance is less than 25 pF. Pin capacitance of ceramic package is less than 15 pF
11. To improve noise rejection a nominal 100 ns glitch rejection circuitry has been added to the RST pin, and a nominal 15 ns glitch rejection
12. Power down mode for 3 V range: Commercial Temperature Range – typ: 0.5 A, max. 20 A; Industrial Temperature Range – typ. 1.0 A,
Philips Semiconductors
DC ELECTRICAL CHARACTERISTICS
T
NOTES:
2003 Jan 24
amb
SYMBOL
V
V
V
V
V
V
V
I
I
I
I
V
R
C
IL
TL
LI
CC
IL
IH
IH1
OL
OL1
OH
OH1
RAM
80C51 8-bit microcontroller family
with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high
speed (30/33 MHz)
RST
IO
due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations.
In the worst cases (capacitive loading > 100 pF), the noise pulse on the ALE pin may exceed 0.8 V. In such cases, it may be desirable to
qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. I
that no single output sinks more than 5 mA and no more than two outputs exceed the test conditions.
address bits are stabilizing.
maximum value when V
12-clock mode characteristics:
Maximum I
Maximum I
Maximum total I
If I
test conditions.
(except EA is 25 pF).
circuitry has been added to the INT0 and INT1 pins. Previous devices provided only an inherent 5 ns of glitch rejection.
max. 30 A;
= 0 C to +70 C or –40 C to +85 C; V
OL
Active mode (operating):
Active mode (reset):
Idle mode:
exceeds the test condition, V
PARAMETER
Input low voltage
Input high voltage (ports 0, 1, 2, 3, EA)
Input high voltage, XTAL1, RST
Output low voltage, ports 1, 2,
Output low voltage, port 0, ALE, PSEN
Output high voltage, ports 1, 2, 3
Output high voltage (port 0 in external bus
mode), ALE
Logical 0 input current, ports 1, 2, 3
Logical 1-to-0 transition current, ports 1, 2, 3
Input leakage current, port 0
Power supply current (see Figure 41 and
Source Code):
Active mode @ 16 MHz
Idle mode @ 16 MHz
Power-down mode or clock stopped
(see Figure 37 for conditions)
RAM keep-alive voltage
Internal reset pull-down resistor
Pin capacitance
OL
OL
per port pin:
per 8-bit port:
OL
OH1
for all outputs:
9
, except when ALE is off then V
amb
, PSEN
IN
10
is approximately 2 V.
= 0 C to +70 C. For T
11
(except EA)
3
I
I
I
CC
CC
CC
CC
test conditions and Figure 41 for I
= 1.0 mA + 1.1 mA
= 7.0 mA + 0.6 mA
= 1.0 mA + 0.22 mA
OL
may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
12
8
15 mA (*NOTE: This is 85 C specification.)
26 mA
71 mA
CC
11
8KB/16KB/32KB/64KB OTP
3
= 2.7 V to 5.5 V; V
OL
8, 7
amb
must be externally limited as follows:
OH
OH
= –40 C to +85 C, I
6
FREQ.[MHz]
on ALE and PSEN to momentarily fall below the V
is the voltage specification.
FREQ.[MHz]
TEST
CONDITIONS
4.0 V < V
2.7 V < V
V
V
V
V
V
V
V
0.45 < V
T
T
FREQ.[MHz]
amb
amb
CC
CC
CC
CC
CC
IN
IN
= 0.4 V
= 2.0 V; See note 4
= 2.7 V; I
= 2.7 V; I
= 2.7 V; I
= 4.5 V; I
= 2.7 V; I
= 0 C to 70 C
= –40 C to +85 C
SS
IN
= 0 V (16 MHz max. CPU clock)
CC
CC
44
CC
< V
< 5.5 V
< 4.0 V
vs. Frequency
OL
OL
OH
OH
OH
CC
= 1.6 mA
= 3.2 mA
TL
= –20 A
= –30 A
= –3.2 mA
– 0.3
= –750 A.
2
2
LIMITS
MIN
–0.5
–0.5
0.2 V
0.7 V
–
–
V
V
V
–1
–
–
1.2
40
–
P87C51RA2/RB2/RC2/RD2
CC
CC
CC
OL
– 0.7
– 0.7
– 0.7
CC
CC
s of ALE and ports 1 and 3. The noise is
+0.9
OL
can exceed these conditions provided
TYP
2
3
CC
–0.7 specification when the
1
MAX
0.2 V
0.7 V
V
V
0.4
0.4
–
–
–
–50
–650
30
50
225
15
10
CC
CC
+0.5
+0.5
CC
CC
–0.1
Product data
UNIT
V
V
V
V
V
V
V
V
V
V
k
pF
A
A
A
A
A
A
A