P87C52UBPN,112 NXP Semiconductors, P87C52UBPN,112 Datasheet - Page 34

IC 80C51 MCU 256 RAM 40DIP

P87C52UBPN,112

Manufacturer Part Number
P87C52UBPN,112
Description
IC 80C51 MCU 256 RAM 40DIP
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet

Specifications of P87C52UBPN,112

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Package
40PDIP
Device Core
80C51
Family Name
87C
Maximum Speed
33 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
UART
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
935253730112
P87C52UBPN
P87C52UBPN
Philips Semiconductors
80C51 ROM CODE SUBMISSION
When submitting ROM code for the 80C51, the following must be specified:
1. 4k byte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
80C52 ROM CODE SUBMISSION
When submitting ROM code for the 80C52, the following must be specified:
1. 8k byte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
2000 Aug 07
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
ADDRESS
0000H to 0FFFH
1000H to 103FH
1040H
1040H
ADDRESS
0000H to 1FFFH
2000H to 203FH
2040H
2040H
Security Bit #1:
Security Bit #2:
Encryption:
Security Bit #1:
Security Bit #2:
Encryption:
Enabled
Enabled
No
Enabled
Enabled
No
CONTENT
DATA
KEY
SEC
SEC
CONTENT
DATA
KEY
SEC
SEC
Disabled
Disabled
Yes
Disabled
Disabled
Yes
If Yes, must send key file.
If Yes, must send key file.
34
BIT(S)
7:0
7:0
0
1
BIT(S)
7:0
7:0
0
1
80C51/87C51/80C52/87C52
COMMENT
User ROM Data
ROM Encryption Key
ROM Security Bit 1
ROM Security Bit 2
COMMENT
User ROM Data
ROM Encryption Key
ROM Security Bit 1
ROM Security Bit 2
Product specification

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