AT32UC3A0512-ALUT Atmel, AT32UC3A0512-ALUT Datasheet - Page 813
AT32UC3A0512-ALUT
Manufacturer Part Number
AT32UC3A0512-ALUT
Description
IC MCU AVR32 512KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A0512-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Package
144LQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
66 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
69
Interface Type
Ethernet/I2S/JTAG/SPI/TWI/USART
Number Of Timers
3
Processor Series
AT32UC3x
Core
AVR32
Data Ram Size
64 KB
Maximum Clock Frequency
66 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105, ATAVRRZ600
Minimum Operating Temperature
- 40 C
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A0512-ALUT
Manufacturer:
ATMEL
Quantity:
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Part Number:
AT32UC3A0512-ALUT
Manufacturer:
AT
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41.5.9
41.5.10
32058J–AVR32–04/11
HMatrix
ADC
4. Peripheral Bus A maximum frequency is 33MHz instead of 66MHz.
5.
6.
7. If the BOD level is higher than VDDCORE, the part is constantly under reset
8. System Timer mask (Bit 16) of the PM CPUMASK register is not available.
1. HMatrix fixed priority arbitration does not work
1.
2.
3. Sleep Mode activation needs additional A to D conversion
Fix/Workaround
In PLL0/1 Control register, the bit 7 should be set in order to prevent unexpected behaviour.
Fix/Workaround
Do not set PBA frequency higher than 33 MHz.
In sleep mode stop all PCx pins will be controlled by GPIO module instead of oscillators.
This can cause drive contention on the XINx in worst case.
Fix/Workaround
Before entering stop mode set all PCx pins to input and GPIO controlled.
Fix/Workaround
Do not set the HSB/CPU speed higher than 50MHz when the firmware generate exceptions.
If the BOD level is set to a value higher than VDDCORE and enabled by fuses, the part will
be in constant reset.
Fix/Workaround
Apply an external voltage on VDDCORE that is higher than the BOD level and is lower than
VDDCORE max and disable the BOD.
Fix/Workaround
Do not use this bit.
Fixed priority arbitration does not work.
Fix/Workaround
Use Round-Robin arbitration instead.
The ADC does not work properly when more than one channel is enabled.
Fix/Workaround
Do not use the ADC with more than one channel enabled at a time.
The OVRE flag does not clear properly if read simultaneously to an end of conversion.
Fix/Workaround
None.
PCx pins go low in stop mode
On some rare parts, the maximum HSB and CPU speed is 50MHz instead of 66MHz.
ADC possible miss on DRDY when disabling a channel
ADC OVRE flag sometimes not reset on Status Register read
813
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