AT32UC3A0512-ALUT Atmel, AT32UC3A0512-ALUT Datasheet - Page 506
AT32UC3A0512-ALUT
Manufacturer Part Number
AT32UC3A0512-ALUT
Description
IC MCU AVR32 512KB FLASH 144LQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3A0512-ALUT
Core Processor
AVR
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
109
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Package
144LQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
66 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
69
Interface Type
Ethernet/I2S/JTAG/SPI/TWI/USART
Number Of Timers
3
Processor Series
AT32UC3x
Core
AVR32
Data Ram Size
64 KB
Maximum Clock Frequency
66 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105, ATAVRRZ600
Minimum Operating Temperature
- 40 C
For Use With
ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A0512-ALUT
Manufacturer:
ATMEL
Quantity:
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Manufacturer:
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30.7.1.4.6
30.7.1.5
30.7.1.5.1
Figure 30-7. Speed Selection in Device Mode
30.7.1.5.2
30.7.1.6
32058J–AVR32–04/11
USB Suspend mode :
Speed Control
DPRAM Management
Device Mode
Host Mode
In peripheral mode, the UDINT.SUSP bit indicates that the usb line is in the suspend mode. In
this case, the USB Data transceiver is automatically set in suspend mode to reduce the
consumption.
When the USB interface is in device mode, the speed selection (full-/low-speed) depends on
which of D+ and D- is pulled up. The LS bit allows to connect an internal pull-up resistor either
on D+ (full-speed mode) or on D- (low-speed mode). The LS bit should be configured before
attaching the device, what can be done by clearing the DETACH bit.
When the USB interface is in host mode, internal pull-down resistors are connected on both D+
and D- and the interface detects the speed of the connected device, which is reflected by the
SPEED bit-field.
Pipes and endpoints can only be allocated in ascending order (from the pipe/endpoint 0 to the
last pipe/endpoint to be allocated). The firmware shall therefore configure them in the same
order.
The allocation of a pipe/endpoint k
cates a memory area in the DPRAM and inserts it between the k
k
point memory windows (from k
i+1
•the VBus Transition interrupt (VBUSTI);
•the Wake-Up interrupt (WAKEUP);
•the Host Wake-Up interrupt (HWUPI).
pipe/endpoint memory window slides up and its data is lost. Note that the following pipe/end-
VBUS
D+
D-
i+2
) do not slide.
i
starts when its ALLOC bit is set. Then, the hardware allo-
UDCON.DETACH
UDCON.LS
i-1
and k
i+1
pipes/endpoints. The
AT32UC3A
506
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