ATMEGA1281-16MU Atmel, ATMEGA1281-16MU Datasheet - Page 433
ATMEGA1281-16MU
Manufacturer Part Number
ATMEGA1281-16MU
Description
IC MCU AVR 128K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA1281-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
6
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRDB101 - MODULE DISPLAY LCD/RGB BACKLIGHT770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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37.3
37.4
37.5
37.6
2549M–AVR–09/10
Rev. 2549K-01/07
Rev. 2549J-09/06
Rev. 2549I-07/06
Rev. 2549H-06/06
1.
2.
3.
4.
5.
6:
7.
8.
9.
10.
1.
2.
3.
4.
5.
6.
1.
2.
3.
1.
2.
3.
Updated
Updated
Updated
Updated
Updated Assembly code example in
after setting the ACBG bit or enabling the ADC, the user must always
allow the reference to start up before the output from the Analog Compar-
ator or ADC is used. To reduce power consumption in Power-down mode,
the user can avoid the three conditions above to ensure that the reference
is turned off before entering Power-down mode.” on page
Updated
Updated Bit description in
on page
Updated code example in
Updated
Updated
Updated
Updated code example in
Boot Section” on page
Updated
Updated
Updated
Updated
Added
Updated
page
page
on page
Updated
Updated
Updated
Added
131,
160,
“Data Retention” on page
Table 30-1 on page
116.
189.
Table 1-1 on page
“Pin Descriptions” on page
“Stack Pointer” on page
“Bit 1 – EEPE: EEPROM Programming Enable” on page
“EIMSK – External Interrupt Mask Register” on page
Figure 25-8 on page
“DC Characteristics” on page
“” on page
“Timer/Counter Prescaler” on page
“Device Identification Register” on page
“Signature Bytes” on page
“Instruction Set Summary” on page
“Fast PWM Mode” on page
“” on page
“OSCCAL – Oscillator Calibration Register” on page
Table 15-3 on page
Table 19-3 on page
Table 16-2 on page
46.
46.
109.
ATmega640/1280/1281/2560/2561
“USART Initialization” on page
371.
“Moving Interrupts Between Application and
“PCIFR – Pin Change Interrupt Flag Register”
3.
284.
129,
187,
148,
11.
16.
Table 15-6 on page
Table 19-6 on page 188
Table 16-4 on page
338.
“Thus, when the BOD is not enabled,
150.
7.
367.
186.
415.
303.
130,
159,
210.
63.
and
Table 15-8 on
Table 16-5 on
115.
50.
Table 19-8
36.
433
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