PIC32MX795F512L-80I/PF Microchip Technology, PIC32MX795F512L-80I/PF Datasheet - Page 50
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PIC32MX795F512L-80I/PF
Manufacturer Part Number
PIC32MX795F512L-80I/PF
Description
IC MCU 32BIT 512KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX795F512L-80I/PF
Core Size
32-Bit
Program Memory Size
512KB (512K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
CAN, Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Controller Family/series
PIC32
Ram Memory Size
128KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
CAN, I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC32MX7xx
Core
MIPS
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX795F512L-80I/PF
Manufacturer:
TOSHIBA
Quantity:
4 600
Company:
Part Number:
PIC32MX795F512L-80I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC32MX795F512L-80I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
supports slowing or Halting the clocks, which reduces
PIC32MX5XX/6XX/7XX
3.3
The PIC32MX5XX/6XX/7XX family core offers a number
of power management features, including low-power
design, active power management and power-down
modes of operation. The core is a static design that
system power consumption during Idle periods.
3.3.1
The mechanism for invoking Power-Down mode is
through execution of the WAIT instruction. For more
information on power management, see
“Power-Saving
3.3.2
The majority of the power consumed by the
PIC32MX5XX/6XX/7XX family core is in the clock tree
and clocking registers. The PIC32 family uses exten-
sive use of local gated clocks to reduce this dynamic
power consumption.
DS61156F-page 50
Power Management
INSTRUCTION-CONTROLLED
POWER MANAGEMENT
LOCAL CLOCK GATING
Features”.
Section 27.0
3.4
The PIC32MX5XX/6XX/7XX family core provides for
an Enhanced JTAG (EJTAG) interface for use in the
software debug of application and kernel code. In
addition to standard User mode and Kernel modes of
operation, the PIC32MX5XX/6XX/7XX family core pro-
vides a Debug mode that is entered after a debug
exception (derived from a hardware breakpoint, single-
step exception, etc.) is taken and continues until a
Debug Exception Return (DERET) instruction is
executed. During this time, the processor executes the
debug exception handler routine.
The EJTAG interface operates through the Test Access
Port (TAP), a serial communication port used for trans-
ferring
PIC32MX5XX/6XX/7XX family core. In addition to the
standard JTAG instructions, special instructions
defined in the EJTAG specification define which
registers are selected and how they are used.
EJTAG Debug Support
test
data
© 2010 Microchip Technology Inc.
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