ATMEGA64L-8MQ Atmel, ATMEGA64L-8MQ Datasheet - Page 227
ATMEGA64L-8MQ
Manufacturer Part Number
ATMEGA64L-8MQ
Description
IC MCU AVR 64K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64L-8MQ
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Analog
Comparator
SFIOR – Special
Function IO Register
2490Q–AVR–06/10
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in
Figure 107. Analog Comparator Block Diagram
Notes:
• Bit 3 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see
Bit
0x20
(0x40)
Read/Write
Initial Value
ADC MULTIPLEXER
1. See
2. Refer to
REFERENCE
Figure
ACME
ADEN
OUTPUT
BANDGAP
TSM
R/W
7
0
Table 94 on page
107.
1)
ACBG
Figure 1 on page 2
R
6
–
0
“Analog Comparator Multiplexed Input” on page
229.
R
5
–
0
and
Table 30 on page 74
R
4
–
0
(1)(2)
ACME
R/W
3
0
PUD
R/W
2
0
for Analog Comparator pin placement.
PSR2
R/W
1
0
ATmega64(L)
PSR10
R/W
0
0
229.
SFIOR
227
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