AT89C51CC01UA-RLTUM Atmel, AT89C51CC01UA-RLTUM Datasheet - Page 85

• Manufacturer Part Number: AT89C51CC01UA-RLTUM
• Description: IC 8051 MCU FLASH 32K 44-VQFP
• Manufacturer: Atmel
• Series: AT89C CANr

Specifications of AT89C51CC01UA-RLTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1280 B
• Interface Type: UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: CANADAPT28
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 44VQFP
• Device Core: 8051
• Family Name: AT89
• Maximum Speed: 40 MHz
• Cpu Family: AT89
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 1.25KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: VQFP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AT89C51CC01UARLTUM

4129N–CAN–03/08
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To enable an interrupt on message object error:
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To enable an interrupt on general error:
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To enable an interrupt on Buffer-full condition:
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To enable an interrupt when Timer overruns:
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When an interrupt occurs, the corresponding message object bit is set in the SIT
register.
To acknowledge an interrupt, the corresponding CANSTCH bits (RXOK, TXOK,...) or
CANGIT bits (OVRTIM, OVRBUF,...), must be cleared by the software application.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error
will also be raised. Consequently, two consecutive interrupts can occur, both due to the
same error.
When a message object error occurs and is set in CANSTCH register, no general error
are set in CANGIE register.
Enable reception interrupt, ENRX.
Enable General CAN IT in the interrupt system register,
Enable interrupt by message object, EICHi,
Enable interrupt on error, ENERCH.
Enable General CAN IT in the interrupt system register,
Enable interrupt on error, ENERG.
Enable General CAN IT in the interrupt system register,
Enable interrupt on Buffer full, ENBUF.
Enable Overrun IT in the interrupt system register.
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