DSPIC30F5015-30I/PT Microchip Technology, DSPIC30F5015-30I/PT Datasheet - Page 227

• Manufacturer Part Number: DSPIC30F5015-30I/PT
• Description: IC DSPIC MCU/DSP 66K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5015-30I/PT

• Program Memory Type: FLASH
• Program Memory Size: 66KB (22K x 24)
• Package / Case: 64-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 52
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 52
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F501530IPT

I
I
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Memory Organization ......................................................... 25
Microchip Internet Web Site ............................................. 229
Modulo Addressing ............................................................ 38
Motor Control PWM Module ............................................... 97
MPLAB ASM30 Assembler, Linker, Librarian .................. 174
MPLAB Integrated Development Environment Software . 173
MPLAB PM3 Device Programmer ................................... 176
MPLAB REAL ICE In-Circuit Emulator System ................ 175
MPLINK Object Linker/MPLIB Object Librarian ............... 174
N
NVM
O
Operating Current (I
Oscillator
Oscillator Configurations .................................................. 154
Oscillator Selection .......................................................... 151
Output Compare Module .................................................... 85
P
Packaging
© 2011 Microchip Technology Inc.
2
2
2
C Module ....................................................................... 113
C 10-bit Slave Mode Operation ..................................... 115
C 7-bit Slave Mode Operation ....................................... 115
Transmission ............................................................ 117
Addresses ................................................................ 115
General Call Address Support ................................. 117
Interrupts .................................................................. 117
IPMI Support ............................................................ 117
Master Operation ..................................................... 117
Master Support ........................................................ 117
Operating Function Description ............................... 113
Operation During CPU Sleep and Idle Modes ......... 118
Pin Configuration ..................................................... 113
Programmer’s Model ................................................ 113
Register Map ............................................................ 119
Registers .................................................................. 113
Slope Control ........................................................... 117
Software Controlled Clock Stretching (STREN = 1) . 116
Various Modes ......................................................... 113
Reception ................................................................. 116
Transmission ............................................................ 116
Reception ................................................................. 115
Transmission ............................................................ 115
Applicability ................................................................ 40
Operation Example .................................................... 39
Start and End Address ............................................... 39
W Address Register Selection ................................... 39
Register Map .............................................................. 55
Operating Modes (Table) ......................................... 152
System Overview ..................................................... 151
Fail-Safe Clock Monitor ............................................ 156
Fast RC (FRC) ......................................................... 155
Initial Clock Source Selection .................................. 154
Low-Power RC (LPRC) ............................................ 156
LP Oscillator Control ................................................ 155
Phase-Locked Loop (PLL) ....................................... 155
Start-up Timer (OST) ............................................... 155
Interrupts .................................................................... 88
Operation During CPU Idle Mode .............................. 88
Operation During CPU Sleep Mode ........................... 88
Register Map .............................................................. 89
Timer2, Timer3 Selection Mode ................................. 86
Information ............................................................... 217
DD
) .................................................... 180
Peripheral Module Disable (PMD) Registers ................... 163
Pinout Descriptions
POR. See Power-on Reset.
Port Write/Read Example .................................................. 62
Position Measurement Mode ............................................. 92
Power-Down Current (I
Power-on Reset (POR) .................................................... 151
Power-Saving Modes ....................................................... 161
Power-Saving Modes (Sleep and Idle) ............................ 151
Program Address Space .................................................... 25
Program Counter ............................................................... 18
Program Data Table Access (MSB) ................................... 28
Program Space Visibility
Programmable ................................................................. 151
Programmable Digital Noise Filters ................................... 93
Programmer’s Model ......................................................... 18
Protection Against Accidental Writes to OSCCON .......... 157
PWM
dsPIC30F5015/5016
Marking .................................................................... 217
dsPIC30F5015 ........................................................... 11
dsPIC30F5016 ........................................................... 14
Oscillator Start-up Timer (OST) ............................... 151
Power-up Timer (PWRT) ......................................... 151
Idle ........................................................................... 162
Sleep ....................................................................... 161
Construction .............................................................. 26
Data Access from Program Memory Using Program
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation .................... 26
Memory Map .............................................................. 25
Table Instructions
Window into Program Space Operation .................... 29
Center-Aligned ......................................................... 101
Complementary Operation ...................................... 102
Dead-Time Generators ............................................ 102
Duty Cycle Comparison Units .................................. 101
Edge-Aligned ........................................................... 100
Fault Pins ................................................................. 105
Independent Output ................................................. 104
Operation During CPU Idle Mode ............................ 106
Operation During CPU Sleep Mode ........................ 106
Output and Polarity Control ..................................... 105
Output Override ....................................................... 104
Period ...................................................................... 100
Single-Pulse Operation ............................................ 104
Special Event Trigger .............................................. 106
Time Base ................................................................. 99
Space Visibility .................................................. 28
tions ................................................................... 27
TBLRDH ............................................................ 27
TBLRDL ............................................................. 27
TBLWTH ............................................................ 27
TBLWTL ............................................................ 27
Assignment ...................................................... 103
Ranges ............................................................ 103
Selection Bits ................................................... 103
Immediate Updates ......................................... 102
Register Buffers ............................................... 102
Enable Bits ...................................................... 105
Fault States ..................................................... 105
Input Modes ..................................................... 105
Priority ............................................................. 105
Output Pin Control ........................................... 105
Complementary Output Mode ......................... 104
Synchronization ............................................... 104
Postscaler ........................................................ 106
PD
) ............................................... 182
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