AT89C51RE2-RLTUM Atmel, AT89C51RE2-RLTUM Datasheet - Page 43

MCU 8051 128K FLASH 44-VQFP

AT89C51RE2-RLTUM

Manufacturer Part Number
AT89C51RE2-RLTUM
Description
MCU 8051 128K FLASH 44-VQFP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51RE2-RLTUM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
UART, SPI
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89OCD-01
Minimum Operating Temperature
- 40 C
Height
1.45 mm
Length
10.1 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
10.1 mm
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51RE2-RLTUM
Manufacturer:
MSC
Quantity:
1 560
Part Number:
AT89C51RE2-RLTUM
Manufacturer:
Atmel
Quantity:
10 000
Extra Row
Hardware Security Byte
(HSB)
7663E–8051–10/08
The following procedure is used to program the Extra Row space and is summarized in
Figure 14:
Figure 14. Flash and Extra row Programming Procedure
The following procedure is used to program the Hardware
summarized in Figure 15:
Load data in the column latches from address FF80h to FFFFh.
Disable the interrupts.
Launch the programming by writing the data sequence 51h followed by A1h in FCON
register.
The end of the programming indicated by the FBUSY flag cleared.
Enable the interrupts.
Set FPS and map Hardware byte (FCON = 0x0C)
Save and disable the interrupts.
Load DPTR at address 0000h
Load Accumulator register with the data to load.
Execute the MOVX @DPTR, A instruction.
Column Latches Loading
Launch Programming
End Programming
Save & Disable IT
Programming
see Figure 13
FCON = 00h
FCON= A0h
FCON= 50h
Clear Mode
Cleared?
Restore IT
FBusy
Flash
EA= 0
Column Latches Loading
Launch Programming
End Programming
Save & Disable IT
Programming
see Figure 13
FCON = 00h
Security
FCON= 51h
FCON= A1h
Clear Mode
Cleared?
Restore IT
XROW
FBusy
EA= 0
AT89C51RE2
Byte space and is
43

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