ATMEGA162V-8PU Atmel, ATMEGA162V-8PU Datasheet - Page 71

• Manufacturer Part Number: ATMEGA162V-8PU
• Description: IC AVR MCU 16K 8MHZ 1.8V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162V-8PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: JTAG/SPI/USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2513K–AVR–07/09
Table 30. Overriding Signals for Alternate Functions in PA7..PA4
Notes:
Table 31. Overriding Signals for Alternate Functions in PA3..PA0
Notes:
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
)
DIEOV
DI
AIO
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
(3)
(2)
(2
(1)
1. ADA is short for ADdress Active and represents the time when address is output.
2. PCINTn is Pin Change Interrupt Enable bit n.
3. PCINTn is Pin Change Interrupt input n.
1. PCINT is Pin Change Interrupt Enable bit n.
2. PCINT is Pin Change Interrupt input n.
nal Memory Interface” on page 26.
PA7/AD7/
PCINT7
SRE
~(WR + ADA
PORTA7
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT7
1
D7 INPUT/
PCINT7
–
PA3/AD3/
PCINT3
SRE
~(WR + ADA) •
PORTA3
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT3
1
D3 INPUT
/PCINT3
–
• WR
D7 OUTPUT
A7
• WR
D3 OUTPUT
A3
(1)
) •
PA6/AD6/PCINT6
SRE
~(WR + ADA) •
PORTA6
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT6
1
D6 INPUT/
PCINT6
–
PA2/AD2/
PCINT2
SRE
~(WR + ADA) •
PORTA2
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT2
1
D2 INPUT
/PCINT2
–
• WR
D6 OUTPUT
A6
• WR
D2 OUTPUT
A2
PA5/AD5/PCINT5
SRE
~(WR + ADA) •
PORTA5
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT5
1
D5 INPUT/
PCINT5
–
PA1/AD1/
PCINT1
SRE
~(WR + ADA) •
PORTA1
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT1
1
D1 INPUT
/PCINT1
–
• WR
D5 OUTPUT
• WR
A5
D1 OUTPUT
A1
ATmega162/V
PA4/AD4/PCINT4
SRE
~(WR + ADA) •
PORTA4
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT4
1
D4 INPUT/
PCINT4
–
PA0/AD0/
PCINT0
SRE
~(WR + ADA) •
PORTA0
SRE
WR + ADA
SRE
if (ADA) then
else
PCIE0 • PCINT0
1
D0 INPUT
/PCINT0
–
• WR
• WR
D4 OUTPUT
D0 OUTPUT
A4
A0
See “Exter-
71