ATMEGA162V-8PU Atmel, ATMEGA162V-8PU Datasheet - Page 70

• Manufacturer Part Number: ATMEGA162V-8PU
• Description: IC AVR MCU 16K 8MHZ 1.8V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162V-8PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: JTAG/SPI/USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Special Function IO
Register – SFIOR
Alternate Functions of
Port A
70
ATmega162/V
• Bit 2 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 64
Port A has an alternate function as the address low byte and data lines for the External Memory
Interface and as Pin Change Interrupt.
Table 29. Port A Pins Alternate Functions
Table 30
Figure 32 on page
Bit
Read/Write
Initial Value
Port Pin
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
and
TSM
R/W
Table 31
7
0
Alternate Function
AD7 (External memory interface address and data bit 7)
PCINT7 (Pin Change INTerrupt 7)
AD6 (External memory interface address and data bit 6)
PCINT6 (Pin Change INTerrupt 6)
AD5 (External memory interface address and data bit 5)
PCINT5 (Pin Change INTerrupt 5)
AD4 (External memory interface address and data bit 4)
PCINT4 (Pin Change INTerrupt 4)
AD3 (External memory interface address and data bit 3)
PCINT3 (Pin Change INTerrupt 3)
AD2 (External memory interface address and data bit 2)
PCINT2 (Pin Change INTerrupt 2)
AD1 (External memory interface address and data bit 1)
PCINT1 (Pin Change INTerrupt 1)
AD0 (External memory interface address and data bit 0)
PCINT0 (Pin Change INTerrupt 0)
68.
XMBK
R/W
6
0
relate the alternate functions of Port A to the overriding signals shown in
for more details about this feature.
XMM2
R/W
5
0
XMM1
R/W
4
0
XMM0
R/W
3
0
PUD
R/W
2
0
PSR2
R/W
1
0
PSR310
R/W
0
0
SFIOR
2513K–AVR–07/09
“Con-