PIC16LF767-I/SP Microchip Technology, PIC16LF767-I/SP Datasheet - Page 90
![IC PIC MCU FLASH 8KX14 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16LF767-I/SP
Manufacturer Part Number
PIC16LF767-I/SP
Description
IC PIC MCU FLASH 8KX14 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF767-I/SP
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC16LF
No. Of I/o's
25
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
AUSART, CCP, I2C, MSSP, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (6Mb)
PIC16F7X7
REGISTER 9-1:
DS30498C-page 88
bit 7-6
bit 5-4
bit 3-0
CCPxCON: CCPx CONTROL REGISTER (ADDRESS 17h, 1Dh, 97h)
bit 7
Unimplemented: Read as ‘0’
CCPxX:CCPxY: PWM Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM3:CCPxM0: CCPx Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit is set)
1001 = Compare mode, clear output on match (CCPxIF bit is set)
1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set, CCPx pin is
1011 = Compare mode, trigger special event (CCPxIF bit is set, CCPx pin is unaffected);
11xx = PWM mode
Legend:
R = Readable bit
-n = Value at POR
U-0
—
unaffected)
CCP1 clears Timer1; CCP2 clears Timer1 and starts an A/D conversion (if A/D module
is enabled)
U-0
—
CCPxX
R/W-0
W = Writable bit
‘1’ = Bit is set
CCPxY
R/W-0
CCPxM3
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCPxM2
R/W-0
2004 Microchip Technology Inc.
CCPxM1
x = Bit is unknown
R/W-0
CCPxM0
R/W-0
bit 0
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