PIC18LF258-I/SP Microchip Technology, PIC18LF258-I/SP Datasheet - Page 23

• Manufacturer Part Number: PIC18LF258-I/SP
• Description: IC MCU FLASH 16KX16 LV CAN 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF258-I/SP

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1536Byte
• Cpu Speed: 40MHz
• No.: RoHS Compliant
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163011, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.6.2
The PIC18FXX8 devices contain circuitry to prevent
“glitches” when switching between oscillator sources.
Essentially, the circuitry waits for eight rising edges of
the clock source that the processor is switching to. This
ensures that the new clock source is stable and that its
pulse width will not be less than the shortest pulse
width of the two clock sources.
Figure 2-7 shows a timing diagram indicating the tran-
sition from the main oscillator to the Timer1 oscillator.
The Timer1 oscillator is assumed to be running all the
time. After the SCS bit is set, the processor is frozen at
the next occurring Q1 cycle. After eight synchronization
cycles are counted from the Timer1 oscillator,
operation resumes. No additional delays are required
after the synchronization cycles.
FIGURE 2-7:
FIGURE 2-8:
© 2006 Microchip Technology Inc.
Internal System
(OSCCON<0>)
Note 1: T
T1OSI
OSC1
Internal
System
Clock
SCS
(OSCCON<0>)
Program
Counter
Note 1: Delay on internal system clock is eight oscillator cycles for synchronization.
Program
Counter
T1OSI
OSC1
OSC2
Clock
SCS
OST
OSCILLATOR TRANSITIONS
Q1
= 1024 T
T
OSC
Q2
Q3
PC
Q3
PC
OSC
Q4
TIMING DIAGRAM FOR TRANSITION FROM OSC1 TO TIMER1 OSCILLATOR
TIMING DIAGRAM FOR TRANSITION BETWEEN TIMER1 AND OSC1 (HS, XT, LP)
(drawing not to scale).
Q4
Q1
T
DLY
1
Q1
T
2
T
1
P
3
T
4
OST
Tscs
PC + 2
5
T
OSC
6
PC + 2
7
The sequence of events that takes place when switch-
ing from the Timer1 oscillator to the main oscillator will
depend on the mode of the main oscillator. In addition
to eight clock cycles of the main oscillator, additional
delays may take place.
If the main oscillator is configured for an external
crystal (HS, XT, LP), the transition will take place after
an oscillator start-up time (T
diagram indicating the transition from the Timer1
oscillator to the main oscillator for HS, XT and LP
modes is shown in Figure 2-8.
1
8
2
Q1
3
Q2
4
T
T
SCS
T
1
5
Q3
P
6
Q4
7
PIC18FXX8
OST
Q1 Q2 Q3 Q4 Q1 Q2
Q1
8
) has occurred. A timing
Q2
PC + 4
DS41159E-page 21
Q3
Q4
PC + 4
Q1
Q3