PIC18LF258-I/SP Microchip Technology, PIC18LF258-I/SP Datasheet - Page 144
![IC MCU FLASH 16KX16 LV CAN 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF258-I/SP
Manufacturer Part Number
PIC18LF258-I/SP
Description
IC MCU FLASH 16KX16 LV CAN 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18LF242-ISO.pdf
(36 pages)
4.PIC18F248-ISO.pdf
(402 pages)
5.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18LF258-I/SP
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Oscillator Type
External
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
1536Byte
Cpu Speed
40MHz
No.
RoHS Compliant
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
4 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF258-I/SP
Manufacturer:
Microchip Technology
Quantity:
135
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18LF242-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- PIC18F248-ISO PDF datasheet #5
- Current page: 144 of 402
- Download datasheet (7Mb)
16.6
When the ECCP is programmed for any of the PWM
modes, the output pins associated with its function may
be configured for auto-shutdown.
Auto-shutdown allows the internal output of either of
the two comparator modules, or the external
interrupt 0, to asynchronously disable the ECCP output
pins. Thus, an external analog or digital event can
discontinue an ECCP sequence. The comparator out-
put(s) to be used is selected by setting the proper mode
bits in the ECCPAS register. To use external interrupt
INT0 as a shutdown event, INT0IE must be set. To use
either of the comparator module outputs as a shutdown
event, corresponding comparators must be enabled.
When a shutdown occurs, the selected output values
(PSSACn, PSSBDn) are written to the ECCP port pins.
REGISTER 16-3:
DS41159E-page 142
PIC18FXX8
Enhanced CCP Auto-Shutdown
bit 7
bit 6-4
bit 3-2
bit 1-0
ECCPAS: ENHANCED CAPTURE/COMPARE/PWM AUTO-SHUTDOWN
CONTROL REGISTER
ECCPASE: ECCP Auto-Shutdown Event Status bit
0 = ECCP outputs enabled, no shutdown event
1 = A shutdown event has occurred, must be reset in software to re-enable ECCP
ECCPAS<2:0>: ECCP Auto-Shutdown bits
000 = No auto-shutdown enabled, comparators have no effect on ECCP
001 = Comparator 1 output will cause shutdown
010 = Comparator 2 output will cause shutdown
011 = Either Comparator 1 or 2 can cause shutdown
100 = INT0
101 = INT0 or Comparator 1 output
110 = INT0 or Comparator 2 output
111 = INT0 or Comparator 1 or Comparator 2 output
PSSACn: Pins A and C Shutdown State Control bits
00 = Drive Pins A and C to ‘0’
01 = Drive Pins A and C to ‘1’
1x = Pins A and C tri-state
PSSBDn: Pins B and D Shutdown State Control bits
00 = Drive Pins B and D to ‘0’
01 = Drive Pins B and D to ‘1’
1x = Pins B and D tri-state
bit 7
ECCPASE ECCPAS2 ECCPAS1 ECCPAS0
Legend:
R = Readable bit
-n = Value at POR
R/W-0
R/W-0
R/W-0
W = Writable bit
‘1’ = Bit is set
R/W-0
The internal shutdown signal is gated with the outputs
and will immediately and asynchronously disable the
outputs. If the internal shutdown is still in effect at the
time a new cycle begins, that entire cycle is
suppressed, thus eliminating narrow, glitchy pulses.
The ECCPASE bit is set by hardware upon a compara-
tor event and can only be cleared in software. The
ECCP outputs can be re-enabled only by clearing the
ECCPASE bit.
The Auto-Shutdown mode can be manually entered by
writing a ‘1’ to the ECCPASE bit.
PSSAC1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PSSAC0
R/W-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
PSSBD1
R/W-0
PSSBD0
R/W-0
bit 0
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