PIC18LF4423-I/PT Microchip Technology, PIC18LF4423-I/PT Datasheet - Page 380
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PIC18LF4423-I/PT
Manufacturer Part Number
PIC18LF4423-I/PT
Description
IC PIC MCU FLASH 8KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2423-ISP.pdf
(54 pages)
2.PIC18F2423-ISP.pdf
(8 pages)
3.PIC18F2423-ISP.pdf
(34 pages)
4.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18LF4423-I/PT
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4423-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2423/2523/4423/4523
C
C Compilers
CALL ................................................................................ 286
CALLW ............................................................................. 315
Capture (CCP Module) ..................................................... 141
Capture (ECCP Module) .................................................. 148
Capture/Compare/PWM (CCP) ........................................ 139
Clock Sources .................................................................... 28
CLRF ................................................................................ 287
CLRWDT .......................................................................... 287
Code Examples
Code Protection ............................................................... 253
COMF ............................................................................... 288
Comparator ...................................................................... 237
DS39755B-page 378
MPLAB C18 ............................................................. 322
MPLAB C30 ............................................................. 322
Associated Registers ............................................... 143
CCP Pin Configuration ............................................. 141
CCPRxH:CCPRxL Registers ................................... 141
Prescaler .................................................................. 141
Software Interrupt .................................................... 141
Timer1/Timer3 Mode Selection ................................ 141
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 140
CCP2 Pin Assignment ............................................. 140
CCPRxH Register .................................................... 140
CCPRxL Register ..................................................... 140
Compare Mode. See Compare.
Interaction of CCP1 and CCP2 for
Module Configuration ............................................... 140
Selecting the 31 kHz Source ...................................... 29
Selection Using OSCCON Register ........................... 29
16 x 16 Signed Multiply Routine ................................ 90
16 x 16 Unsigned Multiply Routine ............................ 90
8 x 8 Signed Multiply Routine .................................... 89
8 x 8 Unsigned Multiply Routine ................................ 89
Changing Between Capture Prescalers ................... 141
Computed GOTO Using an Offset Value ................... 56
Data EEPROM Read ................................................. 85
Data EEPROM Refresh Routine ................................ 86
Data EEPROM Write ................................................. 85
Erasing a Flash Program Memory Row ..................... 78
Fast Register Stack .................................................... 56
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock Using
Initializing PORTA .................................................... 105
Initializing PORTB .................................................... 108
Initializing PORTC .................................................... 111
Initializing PORTD .................................................... 114
Initializing PORTE .................................................... 117
Loading the SSPBUF (SSPSR) Register ................. 164
Reading a Flash Program Memory Word .................. 77
Saving STATUS, WREG and
Writing to Flash Program Memory ....................... 80–81
Analog Input Connection Considerations ................. 241
Associated Registers ............................................... 241
Configuration ............................................................ 238
Effects of a Reset ..................................................... 240
Interrupts .................................................................. 240
Operation ................................................................. 239
Operation During Sleep ........................................... 240
Timer Resources .............................................. 140
Indirect Addressing ............................................ 68
a Timer1 Interrupt Service ............................... 131
BSR Registers in RAM ..................................... 103
Preliminary
Comparator Specifications ............................................... 340
Comparator Voltage Reference ....................................... 243
Compare (CCP Module) .................................................. 142
Compare (ECCP Module) ................................................ 148
Computed GOTO ............................................................... 56
Configuration Bits ............................................................ 253
Configuration Register Protection .................................... 270
Context Saving During Interrupts ..................................... 103
Conversion Considerations .............................................. 374
CPFSEQ .......................................................................... 288
CPFSGT .......................................................................... 289
CPFSLT ........................................................................... 289
Crystal Oscillator/Ceramic Resonator ................................ 23
Customer Change Notification Service ............................ 387
Customer Support ............................................................ 387
D
Data Addressing Modes .................................................... 68
Data EEPROM
Data EEPROM Memory ..................................................... 83
Data Memory ..................................................................... 59
DAW ................................................................................ 290
DC and AC Characteristics
Outputs .................................................................... 239
Reference ................................................................ 239
Response Time ........................................................ 239
Accuracy and Error .................................................. 244
Associated Registers ............................................... 245
Configuring .............................................................. 243
Connection Considerations ...................................... 244
Effects of a Reset .................................................... 244
Operation During Sleep ........................................... 244
Associated Registers ............................................... 143
CCP Pin Configuration ............................................. 142
CCPRx Register ...................................................... 142
Software Interrupt Mode .......................................... 142
Special Event Trigger .............................. 137, 142, 236
Timer1/Timer3 Mode Selection ................................ 142
Comparing Addressing Modes with the
Direct ......................................................................... 68
Indexed Literal Offset ................................................ 70
Indirect ....................................................................... 68
Inherent and Literal .................................................... 68
Code Protection ....................................................... 270
Associated Registers ................................................. 87
EEADR Register ........................................................ 83
EECON1 and EECON2 Registers ............................. 83
Operation During Code-Protect ................................. 86
Protection Against Spurious Write ............................. 86
Reading ..................................................................... 85
Using ......................................................................... 86
Write Verify ................................................................ 85
Writing ....................................................................... 85
Access Bank .............................................................. 62
and the Extended Instruction Set .............................. 70
Bank Select Register (BSR) ...................................... 59
General Purpose Registers ....................................... 62
Map for PIC18F2423/4423 ........................................ 60
Map for PIC18F2523/4523 ........................................ 61
Special Function Registers ........................................ 63
Graphs and Tables .................................................. 363
External Signal ................................................ 239
Internal Signal .................................................. 239
Extended Instruction Set Enabled ..................... 71
Instructions Affected .......................................... 70
© 2007 Microchip Technology Inc.