AT32UC3B1128-AUR Atmel, AT32UC3B1128-AUR Datasheet - Page 615
![MCU AVR32 128K FLASH 48-TQFP](/photos/6/82/68248/313-48-vqfp_sml.jpg)
AT32UC3B1128-AUR
Manufacturer Part Number
AT32UC3B1128-AUR
Description
MCU AVR32 128K FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B1128-AUR
Package / Case
48-TQFP, 48-VQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
28
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 6x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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27.5.3.9
27.5.3.10
32059J–12/2010
HALT
CHIP_ERASE
Table 27-24. AVR_RESET Details (Continued)
This instruction allows a programmer to completely erase all nonvolatile memories in a chip.
This will also clear any security bits that are set, so the device can be accessed normally. In
devices without non-volatile memories this instruction does nothing, and appears to complete
immediately.
The erasing of non-volatile memories starts as soon as the CHIP_ERASE instruction is selected.
The CHIP_ERASE instruction selects a 1 bit bypass data register.
A chip erase operation should be performed as:
1. Reset the system and stop the CPU from executing.
2. Select the IR Scan path.
3. In Capture-IR: The IR output value is latched into the shift register.
4. In Shift-IR: The instruction register is shifted by the TCK input.
5. Check the busy bit that was scanned out during Shift-IR. If the busy bit was set goto 2.
6. Return to Run-Test/Idle.
Table 27-25. CHIP_ERASE Details
This instruction allows a programmer to easily stop the CPU to ensure that it does not execute
invalid code during programming.
This instruction selects a 1-bit halt register. Setting this bit to one resets the device and halts the
CPU. Setting this bit to zero resets the device and releases the CPU to run normally. The value
shifted out from the data register is one if the CPU is halted.
The HALT instruction can be used in the following way:
1. Select the IR Scan path.
2. In Capture-IR: The IR output value is latched into the shift register.
3. In Shift-IR: The instruction register is shifted by the TCK input.
4. Return to Run-Test/Idle.
5. Select the DR Scan path.
Instructions
DR Size
DR input value
DR output value
Instructions
IR input value
IR output value
DR Size
DR input value
DR output value
Details
Device specific.
Device specific.
Device specific.
Details
01111 (0x0F)
p0b01
Where b is the busy bit.
1 bit
x
0
AT32UC3B
615
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