ATMEGA32L-8AUR Atmel, ATMEGA32L-8AUR Datasheet - Page 270

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ATMEGA32L-8AUR

Manufacturer Part Number
ATMEGA32L-8AUR
Description
MCU AVR 32K FLASH 8MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32L-8AUR

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
44TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
TWI/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32L-8AUR
Manufacturer:
Atmel
Quantity:
10 000
SPI Serial
Downloading
SPI Serial
Programming Pin
Mapping
2503Q–AVR–02/11
Table 112. Parallel Programming Characteristics, V
Notes:
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI bus while
RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input), and MISO
(output). After RESET is set low, the Programming Enable instruction needs to be executed first
before program/erase operations can be executed. NOTE, in
mapping for SPI programming is listed. Not all parts use the SPI pins dedicated for the internal
SPI interface.
Table 113. Pin Mapping SPI Serial Programming
Figure 136. SPI Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the serial mode ONLY) and there is no need to first execute the Chip Erase instruc-
Symbol
t
t
t
BVDV
OLDV
OHDZ
Symbol
1.
2. t
1. If the device is clocked by the Internal Oscillator, it is no need to connect a clock source to the
2. V
MOSI
MISO
SCK
commands.
XTAL1 pin.
t
WLRH_CE
CC
WLRH
Parameter
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
-0.3V < AVCC < V
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
is valid for the Chip Erase command.
MOSI
MISO
SCK
Pins
PB5
PB6
PB7
CC
+0.3V, however, AVCC should always be within 2.7V - 5.5V
PB5
PB6
PB7
XTAL1
RESET
GND
I/O
O
I
I
(1)
CC
Description
Serial Data in
Serial Data out
Serial Clock
AVCC
= 5V ±10% (Continued)
VCC
Min
0
+2.7 - 5.5V
+2.7 - 5.5V
Table 113 on page
Typ
(2)
ATmega32(L)
Max
250
250
250
Units
ns
270, the pin
270

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