PIC18LF1330-I/SO Microchip Technology, PIC18LF1330-I/SO Datasheet - Page 3

• Manufacturer Part Number: PIC18LF1330-I/SO
• Description: IC PIC MCU FLASH 4KX16 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF1330-I/SO

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 40MHz
• No.: RoHS Compliant
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4. Module: 10-Bit Analog-to-Digital
REGISTER 15-2:
5. Module: Comparator
a)
b)
© 2008 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
- Reading or writing to CMCON
- Returning the input to its original state
Register 15-2 is modified as shown to:
• Change the bit designations of ADCON<2:0>
• Remove the notes for ADCON<3:0>
The new text appears in bold.
In Section 16.6 “Comparator Interrupts”, the
procedure for clearing the interrupt in the Interrupt
Service Routine is modified with the new text
shown in bold.
End the mismatch condition by doing either of
the following:
Clear flag bit CMPxIF
U-0
(PCFG2, PCFG1 and PCFG0) to R/W-0, to
match PCFG3 (ADCON<3>)
—
Converter (A/D)
Unimplemented: Read as ‘0’
VCFG0: Voltage Reference Configuration bit (V
1 = Positive reference for the A/D is V
0 = Positive reference for the A/D is AV
PCFG3: A/D Port Configuration bit for RA6/AN3
0 = Port is configured as AN3
1 = Port is configured as RA6
PCFG2: A/D Port Configuration bit for RA4/AN2
0 = Port is configured as AN2
1 = Port is configured as RA4
PCFG1: A/D Port Configuration bit for RA1/AN1
0 = Port is configured as AN1
1 = Port is configured as RA1
PCFG0: A/D Port Configuration bit for RA0/AN0
0 = Port is configured as AN0
1 = Port is configured as RA0
U-0
—
ADCON1: A/D CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
U-0
—
VCFG0
R/W-0
REF
DD
+
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG3
R/W-0
6. Module: Comparator Voltage Reference
REF
+ source)
Section 17.1 “Configuring the Comparator
Voltage Reference” is changed to:
• Add new text and a table (Table 17-1) about the
• Modify Register 17-1 (CVRCON) with a new
• Revise Figure 17-1
The textual changes break the last sentence of the
first paragraph of Section 17.1 “Configuring the
Comparator Voltage Reference” into a second
paragraph and adds content. The incorporation of
the three bulleted changes are shown, with new or
altered text indicated by bold face.
voltage reference being able to select the
unscaled V
description of bit 4 (CVRSS)
PIC18F1230/1330
PCFG2
R/W-0
REF
+ for comparator input
x = Bit is unknown
PCFG1
R/W-0
DS80352B-page 3
PCFG0
R/W-0
bit 0