ATMEGA3250-16AUR Atmel, ATMEGA3250-16AUR Datasheet - Page 154
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ATMEGA3250-16AUR
Manufacturer Part Number
ATMEGA3250-16AUR
Description
MCU AVR 32K FLASH 16MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA325-16AUR.pdf
(362 pages)
Specifications of ATMEGA3250-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Part Number
Manufacturer
Quantity
Price
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18.5
18.5.1
2570M–AVR–04/11
Register Description
SPCR – SPI Control Register
Figure 18-3. SPI Transfer Format with CPHA = 0
Figure 18-4. SPI Transfer Format with CPHA = 1
• Bit 7 – SPIE: SPI Interrupt Enable
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set and the if
the Global Interrupt Enable bit in SREG is set.
• Bit 6 – SPE: SPI Enable
When the SPE bit is written to one, the SPI is enabled. This bit must be set to enable any SPI
operations.
Bit
0x2C (0x4C)
Read/Write
Initial Value
SCK (CPOL = 0)
mode 0
SCK (CPOL = 1)
mode 2
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SCK (CPOL = 0)
mode 1
SCK (CPOL = 1)
mode 3
SAMPLE I
MOSI/MISO
CHANGE 0
MOSI PIN
CHANGE 0
MISO PIN
SS
SS
MSB first (DORD = 0)
LSB first (DORD = 1)
MSB first (DORD = 0)
LSB first (DORD = 1)
SPIE
R/W
7
0
SPE
R/W
6
0
MSB
LSB
DORD
MSB
LSB
R/W
5
0
Bit 6
Bit 1
Bit 6
Bit 1
MSTR
R/W
4
0
Bit 5
Bit 2
ATmega325/3250/645/6450
Bit 5
Bit 2
CPOL
R/W
3
0
Bit 4
Bit 3
Bit 4
Bit 3
CPHA
R/W
Bit 3
Bit 4
2
0
Bit 3
Bit 4
SPR1
Bit 2
Bit 5
R/W
1
0
Bit 2
Bit 5
Bit 1
Bit 6
SPR0
R/W
0
0
Bit 1
Bit 6
LSB
MSB
SPCR
LSB
MSB
154
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