AT90CAN32-16AUR Atmel, AT90CAN32-16AUR Datasheet - Page 141
AT90CAN32-16AUR
Manufacturer Part Number
AT90CAN32-16AUR
Description
MCU AVR 32K FLASH 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Specifications of AT90CAN32-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Data Bus Width
8 bit
Mounting Style
SMD/SMT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.11.9
13.11.10 Output Compare Register B – OCR1BH and OCR1BL
13.11.11 Output Compare Register C – OCR1CH and OCR1CL
13.11.12 Output Compare Register A – OCR3AH and OCR3AL
13.11.13 Output Compare Register B – OCR3BH and OCR3BL
13.11.14 Output Compare Register C – OCR3CH and OCR3CL
7679H–CAN–08/08
Output Compare Register A – OCR1AH and OCR1AL
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary high byte register (TEMP). This temporary register is shared by all the other 16-
bit registers.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 116.
R/W
R/W
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
R/W
R/W
OCR1A[15:8]
OCR1B[15:8]
OCR1C[15:8]
OCR3A[15:8]
OCR3B[15:8]
OCR3C[15:8]
4
0
4
0
4
0
4
0
4
0
4
0
OCR1A[7:0]
OCR1B[7:0]
OCR1C[7:0]
OCR3A[7:0]
OCR3B[7:0]
OCR3C[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
2
0
AT90CAN32/64/128
R/W
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
OCR1AH
OCR1BH
OCR1CH
OCR3AH
OCR3BH
OCR3CH
OCR1AL
OCR1BL
OCR1CL
OCR3AL
OCR3BL
OCR3CL
141
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