PIC18F2221-I/ML Microchip Technology, PIC18F2221-I/ML Datasheet - Page 276

IC PIC MCU FLASH 2KX16 28QFN

PIC18F2221-I/ML

Manufacturer Part Number
PIC18F2221-I/ML
Description
IC PIC MCU FLASH 2KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2221-I/ML

Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Package
28QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
10-chx10-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2221-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2221/2321/4221/4321 FAMILY
FIGURE 24-7:
FIGURE 24-8:
DS39689F-page 276
TBLPTR = 0008FFh
Results: All table reads from external blocks to Blockn are disabled whenever EBTRn = 0.
Note 1: See Figure 24-5 for block boundaries.
Results: Table reads permitted within Blockn, even when EBTRBn = 0.
Note 1: See Figure 24-5 for block boundaries.
TBLPTR = 0008FFh
Register Values
Register Values
PC = 003FFEh
PC = 007FFEh
TABLAT register returns a value of ‘0’.
TABLAT register returns the value of the data at the location TBLPTR.
EXTERNAL BLOCK TABLE READ (EBTRn) DISALLOWED
EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
Program Memory
Program Memory
Boot Block
Boot Block
Block 0
TBLRD*
Block 1
Block 0
Block 1
TBLRD*
(1)
(1)
Configuration Bit Settings
Configuration Bit Settings
WRTB, EBTRB = 11
WRT1, EBTR1 = 11
WRT0, EBTR0 = 10
WRTB, EBTRB = 11
WRT0, EBTR0 = 10
WRT1, EBTR1 = 11
© 2009 Microchip Technology Inc.

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