PIC18F2221-I/ML Microchip Technology, PIC18F2221-I/ML Datasheet - Page 141

• Manufacturer Part Number: PIC18F2221-I/ML
• Description: IC PIC MCU FLASH 2KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2221-I/ML

• Core Size: 8-Bit
• Program Memory Size: 4KB (2K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 28QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SPI/USART
• On-chip Adc: 10-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

15.0
The Timer3 timer/counter module incorporates these
features:
• Software selectable operation as a 16-bit timer or
• Readable and writable 8-bit registers (TMR3H
• Selectable clock source (internal or external) with
• Interrupt-on-overflow
• Module Reset on CCP Special Event Trigger
REGISTER 15-1:
© 2009 Microchip Technology Inc.
counter
and TMR3L)
device clock or Timer1 oscillator internal options
TIMER3 MODULE
bit 7
bit 6,3
bit 5-4
bit 2
bit 1
bit 0
T3CON: TIMER3 CONTROL REGISTER
PIC18F2221/2321/4221/4321 FAMILY
RD16: 16-Bit Read/Write Mode Enable bit
1 = Enables register read/write of Timer3 in one 16-bit operation
0 = Enables register read/write of Timer3 in two 8-bit operations
T3CCP<2:1>: Timer3 and Timer1 to CCPx Enable bits
1x = Timer3 is the capture/compare clock source for the CCP modules
01 = Timer3 is the capture/compare clock source for CCP2; Timer1 is the capture/compare
00 = Timer1 is the capture/compare clock source for the CCP modules
T3CKPS<1:0>: Timer3 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
T3SYNC: Timer3 External Clock Input Synchronization Control bit
(Not usable if the device clock comes from Timer1/Timer3.)
When TMR3CS = 1:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR3CS = 0:
This bit is ignored. Timer3 uses the internal clock when TMR3CS = 0.
TMR3CS: Timer3 Clock Source Select bit
1 = External clock input from Timer1 oscillator or T13CKI (on the rising edge after the first
0 = Internal clock (F
TMR3ON: Timer3 On bit
1 = Enables Timer3
0 = Stops Timer3
Legend:
R = Readable bit
-n = Value at POR
bit 7
R/W-0
RD16
falling edge)
clock source for CCP1
T3CCP2
R/W-0
OSC
T3CKPS1
/4)
R/W-0
W = Writable bit
‘1’ = Bit is set
T3CKPS0
R/W-0
A simplified block diagram of the Timer3 module is
shown in Figure 15-1. A block diagram of the module’s
operation in Read/Write mode is shown in Figure 15-2.
The Timer3 module is controlled through the T3CON
register (Register 15-1). It also selects the clock source
options for the CCP modules (see Section 16.1.1
“CCP Modules and Timer Resources” for more
information).
T3CCP1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
T3SYNC
R/W-0
TMR3CS
x = Bit is unknown
R/W-0
DS39689F-page 141
TMR3ON
R/W-0
bit 0