ATMEGA8515-16PU Atmel, ATMEGA8515-16PU Datasheet - Page 177

• Manufacturer Part Number: ATMEGA8515-16PU
• Description: IC AVR MCU 8K 16MHZ 5V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515-16PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Cpu Speed: 16 MIPS
• Eeprom Memory: 512 Bytes
• Input Output: 35
• Interface: SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 8K Bytes
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 4.5-5.5 V
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

ATmega8515 Boot Loader
Parameters
2512K–AVR–01/10
In Table 78 through Table 80, the parameters used in the description of the Self-Pro-
gramming are given.
Table 78. Boot Size Configuration
Note:
Table 79. Read-While-Write Limit
Note:
BOOTS
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Z1
Wait_ee:
1
1
0
0
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEWE
rjmp Wait_ee
; SPM timed sequence
out
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
1. The different BOOTSZ Fuse configurations are shown in Figure 73
1. For details about these two section, see “NRWW – No Read-While-Write Section” on
BOOTS
page 167 and “RWW – Read-While-Write Section” on page 167.
temp2, SREG
SPMCR, spmcrval
SREG, temp2
Z0
1
0
1
0
Boot
Size
128
words
256
words
512
words
1024
words
Pages
16
32
4
8
(1)
(1)
Application
Flash
Section
0x000 -
0xF7F
0x000 -
0xEFF
0x000 -
0xDFF
0x000 -
0xBFF
Boot
Loader
Flash
Section
0xF80 -
0xFFF
0xF00 -
0xFFF
0xE00 -
0xFFF
0xC00 -
0xFFF
Pages
ATmega8515(L)
96
32
End
Application
Section
0xF7F
0xEFF
0xDFF
0xBFF
Address
0x000 - 0xBFF
0xC00 - 0xFFF
Boot
Reset
Address
(start
Boot
Loader
Section)
0xF80
0xF00
0xE00
0xC00
177