PIC16C642-04/SO Microchip Technology, PIC16C642-04/SO Datasheet - Page 59

• Manufacturer Part Number: PIC16C642-04/SO
• Description: IC MCU OTP 4KX14 COMP 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C642-04/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 22
• Ram Memory Size: 176Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: RS- 232
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

9.3
The PIC16CXXX differentiates between various kinds
of reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any reset condition;
their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
FIGURE 9-7:
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
V
1996 Microchip Technology Inc.
MCLR/
OSC1/
CLKIN
PP
V
Pin
Power-on reset (POR)
MCLR reset during normal operation
MCLR reset during SLEEP
WDT reset (normal operation)
Brown-out Reset (BOR)
Parity Error Reset (PER)
DD
Pin
Reset
On-chip
RC OSC
OST/PWRT
Brown-out
Program
Memory
V
Module
(1)
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
detect
Parity
WDT
DD
Reset
rise
OST
PWRT
SLEEP
10-bit Ripple-counter
WDT Time-out
10-bit Ripple-counter
Power-on Reset
MPEEN
BODEN
External
Reset
Preliminary
PIC16C64X & PIC16C66X
Enable PWRT
Enable OST
state” on Power-on reset, MCLR, WDT reset,
Brown-out Reset, Parity Error Reset, and on MCLR
reset during SLEEP. They are not affected by a WDT
wake-up, since this is viewed as the resumption of nor-
mal operation. TO and PD bits are set or cleared differ-
ently in different reset situations as indicated in
Table 9-4. These bits are used in software to determine
the nature of the reset. See Table 9-6 for a full descrip-
tion of reset states of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 9-7.
The MCLR reset path has a noise filter to detect and
ignore small pulses. See Table 12-6 for pulse width
specification.
See Table 9-3 for time-out situations.
S
R
DS30559A-page 59
Q
Chip_Reset