PIC16C642-04/SO Microchip Technology, PIC16C642-04/SO Datasheet - Page 51

• Manufacturer Part Number: PIC16C642-04/SO
• Description: IC MCU OTP 4KX14 COMP 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C642-04/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 22
• Ram Memory Size: 176Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: RS- 232
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

7.6
The comparator interrupt flag is set whenever there is
a change in the output value of either comparator. User
software will need to maintain information about the
status of the output bits, as read from CMCON<7:6>, to
determine the actual change that has occurred. The
CMIF bit (PIR1<6>), is the comparator interrupt flag
and must be cleared in user software.
To enable the Comparator interrupt the following bits
must be set:
• CMIE (PIE1<6>)
• PEIE (INTCON<6>)
• GIE (INTCON<7>)
The user, in the interrupt service routine, can clear the
interrupt in the following manner:
a)
b)
A mismatch condition will continue to set flag bit CMIF.
Reading CMCON will end the mismatch condition, and
allow flag bit CMIF to be cleared.
7.7
When a comparator is active and the device is placed
in SLEEP mode, the comparator remains active and
the interrupt is functional if enabled. This interrupt will
wake up the device from SLEEP mode when enabled.
While the comparator is powered up, higher sleep
currents than shown in the power-down current
specification will occur. Each comparator that is
operational will consume additional current as shown in
the comparator specifications. To minimize power
consumption while in SLEEP mode, turn off the
FIGURE 7-5:
1996 Microchip Technology Inc.
Any read or write of CMCON. This will end the
mismatch condition.
Clear flag bit CMIF.
Comparator Interrupts
Comparator Operation During SLEEP
V
Legend C
A
ANALOG INPUT MODEL
R
S
V
I
R
R
V
LEAKAGE
T
A
PIN
IC
S
A
IN
5 pF
C
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to various junctions
= Interconnect Resistance
= Source Impedance
= Analog Voltage
Preliminary
PIC16C64X & PIC16C66X
V
DD
V
V
T
T
= 0.6V
= 0.6V
comparators, CM2:CM0 = 111, before entering sleep.
If the device wakes up from sleep, the contents of the
CMCON register are not affected.
7.8
A device reset forces the CMCON register to its reset
state. This forces the comparator module to be in the
comparator
ensures that all potential inputs are analog inputs.
Device current is minimized when analog inputs are
present at reset time. The comparators will be powered
down during the reset interval.
7.9
A simplified circuit for an analog input is shown in
Figure 7-5. Since the analog pins are connected to a
digital output, they have reverse biased diodes to V
and V
V
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latch-up may occur. A
maximum
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
SS
and V
SS
. The analog input therefore, must be between
Effects of a RESET
Analog Input Connection
Considerations
I
V
LEAKAGE
DD
500 nA
SS
source
. If the input voltage deviates from this
reset
R
C
< 10k
mode,
impedance
CM2:CM0 = 000.
DS30559A-page 51
of
10 k
This
DD
is