ATMEGA8515-16AU Atmel, ATMEGA8515-16AU Datasheet - Page 206

• Manufacturer Part Number: ATMEGA8515-16AU
• Description: IC AVR MCU 8K 16MHZ 5V 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: SPI/USART
• Total Internal Ram Size: 512Byte
• # I/os (max): 35
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Family Name: ATmega
• Maximum Speed: 16 MHz
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

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ATmega8515(L)
Figure 91. External Memory Timing (SRWn1 = 1, SRWn0 = 0)
Figure 92. External Memory Timing (SRWn1 = 1, SRWn0 = 1)
Note:
System Clock (CLK
System Clock (CLK
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 0)
1. The ALE pulse in the last period (T4-T7) is only present if the next instruction
DA7:0
A15:8
CPU
ALE
DA7:0
WR
A15:8
RD
CPU
ALE
accesses the RAM (internal or external).
WR
RD
)
)
Prev. Addr.
Prev. Data
Prev. Addr.
Prev. Data
T1
T1
1
Address
Address
4
2
1
5
T2
6
Address
Address
3a
3b
4
2
XX
7
5
8
T2
6
13
3a
3b
XX
10
7
8
13
T3
10
T3
Data
Address
12
Data
16
15
T4
9
Data
Address
12
Data
16
15
9
T4
T5
11
(1)
T5
T6
11
14
2512K–AVR–01/10
T6
14
T7