PIC18F8390T-I/PT Microchip Technology, PIC18F8390T-I/PT Datasheet - Page 90

• Manufacturer Part Number: PIC18F8390T-I/PT
• Description: IC PIC MCU FLASH 4KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8390T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F6390/6490/8390/8490
6.2
Two control registers are used in conjunction with the
TBLRD instruction: the TABLAT register and the
TBLPTR register set.
6.2.1
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch register is used to
hold 8-bit data during data transfers between program
memory and data RAM.
6.2.2
The Table Pointer register (TBLPTR) addresses a byte
within the program memory. It is comprised of three
SFR registers: Table Pointer Upper Byte, Table Pointer
High
(TBLPTRU:TBLPTRH:TBLPTRL). Only the lower six
bits of TBLPTRU are used with TBLPTRH and
TBLPTRL to form a 22-bit wide pointer.
The contents of TBLPTR indicates a location in
program memory space. The low-order 21 bits allow
the device to address the full 2 Mbytes of program
memory space. The 22nd bit allows access to the
configuration space, including the device ID, user ID
locations and the Configuration bits.
The TBLPTR register set is updated when executing a
TBLRD in one of four ways, based on the instruction’s
arguments. These are detailed in Table 6-1. These
operations on the TBLPTR only affect the low-order
21 bits.
When a TBLRD is executed, all 22 bits of the TBLPTR
determine which byte is read from program memory
into TABLAT.
FIGURE 6-2:
DS39629C-page 88
Byte
Instruction Register
Control Registers
TABLE LATCH REGISTER (TABLAT)
TABLE POINTER REGISTER
(TBLPTR)
(IR)
and
READS FROM FLASH PROGRAM MEMORY
Table
Pointer
(Even Byte Address)
FETCH
Low
Program Memory
Byte
(Odd Byte Address)
TABLE 6-1:
6.3
The TBLRD instruction is used to retrieve data from
program memory and places it into data RAM. Table
reads from program memory are performed one byte at
a time.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified
automatically for the next table read operation.
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word. Figure 6-2
shows the interface between the internal program
memory and the TABLAT.
A typical method for reading data from program memory
is shown in Example 6-1.
TBLRD*
TBLRD*+
TBLRD*-
TBLRD+*
Example
TBLPTR = xxxxx1
TBLRD
Reading the Flash Program
Memory
TBLPTR is not modified
TBLPTR is incremented after the read
TBLPTR is decremented after the read
TBLPTR is incremented before the read
TABLE POINTER
OPERATIONS WITH TBLRD
INSTRUCTIONS
Operation on Table Pointer
Read Register
© 2007 Microchip Technology Inc.
TABLAT
TBLPTR = xxxxx0