PIC18F8390T-I/PT Microchip Technology, PIC18F8390T-I/PT Datasheet - Page 380

• Manufacturer Part Number: PIC18F8390T-I/PT
• Description: IC PIC MCU FLASH 4KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8390T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, LCD, POR, PWM, WDT
• Number Of I /o: 66
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, EUSART, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 66
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163028
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPDM163028 - BOARD DEMO PICDEM LCDAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F6390/6490/8390/8490
FIGURE 26-14:
TABLE 26-16: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
DS39629C-page 378
Param
70
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1:
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SS
SC
SC
Symbol
B
DO
DO
2
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
L2
Refer to Figure 26-4 for load conditions.
L2
L2
H2
H2
L2
H2
L2
H
L
H2
L2
R
F
B
R
F
DO
SC
SC
DO
SS
DI
DO
SS
DO
DI
L
H
L,
V SDO Data Output Valid after SS ↓
H,
L
V
H,
V,
Z SS ↑ to SDO Output High-Impedance
SS ↓ to SCK ↓ or SCK ↑ Input
SCK Input High Time
(Slave mode)
SCK Input Low Time
(Slave mode)
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time
(Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK
Edge
Edge
SS ↑ after SCK Edge
82
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
MSb In
MSb
74
71
75, 76
Characteristic
72
bit 6 - - - - - - 1
bit 6 - - - - 1
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
80
LSb
LSb In
1.25 T
1.25 T
1.5 T
Min
T
100
CY
40
40
CY
10
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
© 2007 Microchip Technology Inc.
77
Max Units Conditions
100
100
25
25
50
25
25
50
50
—
—
—
—
—
—
45
45
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
DD
DD
DD
DD
= 2.0V
= 2.0V
= 2.0V
= 2.0V