PIC16LF1946-I/MR Microchip Technology, PIC16LF1946-I/MR Datasheet - Page 132

• Manufacturer Part Number: PIC16LF1946-I/MR
• Description: MCU 8BIT 14KB FLASH 3.6V 64QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1946-I/MR

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Controller Family/series: PIC16LF
• No. Of I/o's: 54
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: MI2C, SPI, EUSART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 17 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16F/LF1946/47
REGISTER 12-9:
TABLE 12-3:
DS41414B-page 132
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
Note 1:
INTCON
IOCBP
IOCBN
IOCBF
LATB
LCDSE1
LCDSE3
LCDSE4
OPTION_REG
PORTB
T1GCON
TRISB
WPUB
Legend:
R/W-1/1
WPUB7
Name
2:
Global WPUEN bit of the OPTION register must be cleared for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in configured as an output.
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTB.
TMR1GE
IOCBP7
IOCBN7
IOCBF7
WPUEN
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled
0 = Pull-up disabled
TRISB7
WPUB7
LATB7
SE15
SE31
SE39
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
RB7
GIE
R/W-1/1
WPUB6
WPUB: WEAK PULL-UP PORTB REGISTER
T1GPOL
INTEDG
IOCBP6
IOCBN6
IOCBF6
TRISB6
WPUB6
LATB6
SE14
SE30
SE38
PEIE
Bit 6
RB6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-1/1
WPUB5
TMR0CS
TMR0IE
IOCBP5
IOCBN5
IOCBF5
TRISB5
WPUB5
T1GTM
LATB5
SE13
SE29
SE37
Bit 5
RB5
R/W-1/1
WPUB4
TMR0SE
T1GSPM
IOCBN4
IOCBP4
IOCBF4
TRISB4
WPUB4
LATB4
Preliminary
SE12
SE28
SE36
INTE
Bit 4
RB4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
T1GGO/DONE
R/W-1/1
WPUB3
IOCBN3
IOCBP3
IOCBF3
WPUB3
TRISB3
LATB3
IOCIE
SE11
SE27
SE35
Bit 3
PSA
RB3
IOCBN2
T1GVAL
TMR0IF
IOCBP2
IOCBF2
TRISB2
WPUB2
R/W-1/1
LATB2
WPUB2
SE10
SE26
SE34
Bit 2
RB2
PS<2:0>
IOCBN1
 2010 Microchip Technology Inc.
IOCBP1
IOCBF1
WPUB1
TRISB1
LATB1
SE25
SE33
Bit 1
INTF
SE9
RB1
T1GSS<1:0>
R/W-1/1
WPUB1
IOCBN0
IOCBP0
IOCBF0
WPUB0
TRISB0
LATB0
IOCIF
SE24
SE32
Bit 0
SE8
RB0
R/W-1/1
WPUB0
Register
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bit 0