DSPIC30F2011-20E/ML Microchip Technology, DSPIC30F2011-20E/ML Datasheet - Page 14
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DSPIC30F2011-20E/ML
Manufacturer Part Number
DSPIC30F2011-20E/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
Specifications of DSPIC30F2011-20E/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
For Use With
DAF30-4 - DEVICE ATP FOR ICE4000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
dsPIC30F Family Reference Manual
Figure 35-5:
DS70272B-page 35-14
Note 1: Operation for 8-bit mode is shown; the 16-bit mode is similar.
SS1
SCK1
(CKP = 0
CKE = 0)
SCK1
(CKP = 1
CKE = 0)
SPITBF
SDO1
SDI1
(SMP = 0)
Input
Sample
(SMP = 0)
SPI1IF
SPIRBF
(2)
2: When the SSEN (SPI1CON1<7>) bit is set to ‘1’, the SS1 pin must be driven low to enable transmission and
3: Transmit data is held in SPI1TXB and SPITBF remains set until all bits are transmitted.
(3)
User application
writes to SPI1BUF
reception in Slave mode.
SPI1 Slave Mode Timing (Slave Select Pin Enabled)
SPI1BUF
to
SPI1SR
bit 7
bit 7
bit 6
bit 5
bit 4
bit 3
(1)
bit 2
SPI1SR to
SPI1BUF
bit 1
© 2008 Microchip Technology Inc.
User application
reads SPI1BUF
bit 0
bit 0
1 instruction
cycle latency