PIC18F45K20-I/P Microchip Technology, PIC18F45K20-I/P Datasheet - Page 258

IC PIC MCU FLASH 16KX16 40DIP

PIC18F45K20-I/P

Manufacturer Part Number
PIC18F45K20-I/P
Description
IC PIC MCU FLASH 16KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/P

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC18F2XK20/4XK20
18.4.1.5
1.
2.
3.
FIGURE 18-10:
FIGURE 18-11:
DS41303G-page 258
TX/CK pin
(SCKP = 0)
TX/CK pin
(SCKP = 1)
TRMT bit
RX/DT
pin
Write to
TXREG Reg
TXIF bit
(Interrupt Flag)
TXEN bit
Note:
Initialize the SPBRGH, SPBRG register pair and
the BRGH and BRG16 bits to achieve the
desired baud rate (see Section 18.3 “EUSART
Baud Rate Generator (BRG)”).
Set the RX/DT and TX/CK TRIS controls to ‘1’.
Enable the synchronous master serial port by
setting bits SYNC, SPEN and CSRC. Set the
TRIS bits corresponding to the RX/DT and
TX/CK I/O pins.
‘1’
Synchronous Master Transmission
Set-up:
Sync Master mode, SPBRG = 0, continuous transmission of two 8-bit words.
Write Word 1
TXREG reg
RX/DT pin
TX/CK pin
TRMT bit
TXEN bit
TXIF bit
Write to
SYNCHRONOUS TRANSMISSION
SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
bit 0
Write Word 2
bit 1
Word 1
bit 0
bit 2
bit 1
bit 7
4.
5.
6.
7.
8.
9.
Disable Receive mode by clearing bits SREN
and CREN.
Enable Transmit mode by setting the TXEN bit.
If 9-bit transmission is desired, set the TX9 bit.
If interrupts are desired, set the TXIE, GIE and
PEIE interrupt enable bits.
If 9-bit transmission is selected, the ninth bit
should be loaded in the TX9D bit.
Start transmission by loading data to the
TXREG register.
bit 2
bit 0
Word 2
bit 1
bit 6
 2010 Microchip Technology Inc.
bit 7
bit 7
‘1’

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