PIC18F45K20-I/P Microchip Technology, PIC18F45K20-I/P Datasheet - Page 125

• Manufacturer Part Number: PIC18F45K20-I/P
• Description: IC PIC MCU FLASH 16KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: CCP/ECCP/EUSART/I2C/MSSP/SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 64 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 10-3:
 2010 Microchip Technology Inc.
RB0/INT0/FLT0/
AN12
RB1/INT1/AN10/
C12IN3-/P1C
RB2/INT2/AN8/
P1B
RB3/AN9/C12IN2-/
CCP2
RB4/KBI0/AN11/
P1D
RB5/KBI1/PGM
Legend:
Note 1:
2:
3:
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Configuration on POR is determined by the PBADEN Configuration bit. Pins are configured as analog inputs by default
when PBADEN is set and digital inputs when PBADEN is cleared.
Alternate assignment for CCP2 when the CCP2MX Configuration bit is ‘0’. Default assignment is RC1.
All other pin functions are disabled when ICSP or ICD are enabled.
PORTB I/O SUMMARY
Function
C12IN3-
C12IN2-
CCP2
AN12
AN10
AN11
FLT0
PGM
INT0
INT1
INT2
KBI0
KBI1
RB0
RB1
P1C
RB2
AN8
P1B
RB3
AN9
RB4
P1D
RB5
(2)
Setting
TRIS
0
1
1
1
1
0
1
1
1
1
0
0
1
1
1
0
0
1
1
1
0
1
0
1
1
1
0
0
1
1
x
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
TTL
TTL
DIG
DIG
TTL
TTL
I/O
ST
ST
ST
ST
ST
ST
LATB<0> data output; not affected by analog input.
PORTB<0> data input; Programmable weak pull-up. Disabled when
analog input enabled.
External interrupt 0 input.
Enhanced PWM Fault input (ECCP1 module); enabled by software.
A/D input channel 12.
LATB<1> data output; not affected by analog input.
PORTB<1> data input; Programmable weak pull-up. Disabled when
analog input enabled.
External Interrupt 1 input.
ADC input channel 10.
Comparators C1 and C2 inverting input, channel 3. Analog select is
shared with ADC.
ECCP PWM output (28-pin devices only).
LATB<2> data output; not affected by analog input.
PORTB<2> data input; Programmable weak pull-up. Disabled when
analog input enabled.
External interrupt 2 input.
ADC input channel 8.
ECCP PWM output (28-pin devices only).
LATB<3> data output; not affected by analog input.
PORTB<3> data input; Programmable weak pull-up. Disabled when
analog input enabled.
ADC input channel 9.
Comparators C1 and C2 inverting input, channel 2. Analog select is
shared with ADC.
CCP2 compare and PWM output.
CCP2 capture input
LATB<4> data output; not affected by analog input.
PORTB<4> data input; Programmable weak pull-up. Disabled when
analog input enabled.
Interrupt-on-pin change.
ADC input channel 11.
ECCP PWM output (28-pin devices only).
LATB<5> data output.
PORTB<5> data input; Programmable weak pull-up.
Interrupt-on-pin change.
Single-Supply Programming mode entry (ICSP™). Enabled by LVP
Configuration bit; all other pin functions disabled.
PIC18F2XK20/4XK20
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Description
DS41303G-page 125