ATTINY461-15MZ Atmel, ATTINY461-15MZ Datasheet - Page 157

• Manufacturer Part Number: ATTINY461-15MZ
• Description: MCU AVR 4K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY461-15MZ

• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 16
• Eeprom Size: 256 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.10 Register Description
19.10.1
7753F–AVR–01/11
ADMUX – ADC Multiplexer Selection Register
• Bit 7:6 – REFS1:REFS0: Voltage Reference Selection Bits
These bits and the REFS2 bit from the ADC Control and Status Register B (ADCSRB) select the
voltage reference for the ADC, as shown in
conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSR is
set). Whenever these bits are changed, the next conversion will take 25 ADC clock cycles. If
active channels are used, using AVCC or an external AREF higher than (AVCC - 1V) is not
recommended, as this will affect ADC accuracy. The internal voltage reference options may not
be used if an external voltage is being applied to the AREF pin.
Table 19-4.
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
• Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits
These bits and the MUX5 bit from the ADC Control and Status Register B (ADCSRB) select
which combination of analog inputs are connected to the ADC. In case of differential input, gain
selection is also made with these bits. Selecting the same pin as both inputs to the differential
gain stage enables offset measurements. Selecting the single-ended channel ADC11 enables
the temperature sensor. Refer to
conversion, the change will not go into effect until this conversion is complete (ADIF in ADCSRA
is set).
Bit
0x07 (0x27)
Read/Write
Initial Value
REFS2
X
X
0
0
1
1
161.
REFS1
Voltage Reference Selections for ADC
REFS1
R/W
0
0
1
1
1
1
7
0
REFS0
REFS0
R/W
6
0
0
1
0
1
0
1
ADLAR
R/W
ATtiny261/ATtiny461/ATtiny861
5
0
Voltage Reference (V
V
External Voltage Reference at AREF pin, Internal Voltage
Reference turned off.
Internal 1.1V Voltage Reference.
Reserved.
Internal 2.56V Voltage Reference without external bypass
capacitor, disconnected from AREF.
Internal 2.56V Voltage Reference with external bypass capacitor
at AREF pin.
Table 19-5
CC
used as Voltage Reference, disconnected from AREF.
MUX4
R/W
4
0
Table
“ADCL and ADCH – The ADC Data Register” on
for details. If these bits are changed during a
MUX3
R/W
3
0
19-4. If these bits are changed during a
REF
) Selection
MUX2
R/W
2
0
MUX1
R/W
1
0
MUX0
R/W
0
0
ADMUX
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