ATTINY461-15MZ Atmel, ATTINY461-15MZ Datasheet - Page 123

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ATTINY461-15MZ

Manufacturer Part Number
ATTINY461-15MZ
Description
MCU AVR 4K FLASH 15MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY461-15MZ

Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
16
Eeprom Size
256 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
256 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 11x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.11.6
16.11.7
7753F–AVR–01/11
TCNT1 – Timer/Counter1
TC1H – Timer/Counter1 High Byte
The actual value from the port register will be visible on the port pin, when the Output Compare
Override Enable Bit is cleared.
and their corresponding Output Compare pins.
Table 16-20. Output Compare Override Enable Bits vs. Output Compare Pins
This 8-bit register contains the value of Timer/Counter1.
The Timer/Counter1 is realized as a 10-bit up/down counter with read and write access. Due to
synchronization of the CPU, Timer/Counter1 data written into Timer/Counter1 is delayed by one
and half CPU clock cycles in synchronous mode and at most one CPU clock cycles for asyn-
chronous mode. When a 10-bit accuracy is preferred, special procedures must be followed for
accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures are
described in section
can be used as an 8-bit Timer/Counter. Note that the Timer/Counter1 always starts counting up
after writing the TCNT1 register.
The temporary Timer/Counter1 register is an 2-bit read/write register.
• Bits 7:2 - Res: Reserved Bits
These bits are reserved bits in the ATtiny261/461/861 and always reads as zero.
• Bits 1:0 - TC19, TC18: Two MSB bits of the 10-bit accesses
If 10-bit accuracy is used, the Timer/Counter1 High Byte Register (TC1H) is used for temporary
storing the MSB bits (TC19, TC18) of the 10-bit accesses. The same TC1H register is shared
between all 10-bit registers within the Timer/Counter1. Note that special procedures must be fol-
lowed when accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures
are described in section
OC1OE0
OC1A
Bit
0x2E (0x4E)
Read/Write
Initial value
Bit
0x25 (0x45)
Read/Write
Initial value
(PB0)
MSB
R/W
OC1OE1
OC1A
R
7
0
7
0
-
“Accessing 10-Bit Registers” on page
(PB1)
“Accessing 10-Bit Registers” on page
R/W
R
6
0
6
0
-
Table 16-20
OC1OE2
OC1B
R/W
ATtiny261/ATtiny461/ATtiny861
R
5
0
5
0
-
(PB2)
R/W
R
4
0
4
0
-
shows the Output Compare Override Enable Bits
OC1OE3
OC1B
R/W
R
3
0
3
0
-
(PB3)
112. Alternatively the Timer/Counter1
R/W
112.
R
0
2
0
2
-
OC1OE4
OC1D
TC19
(PB4)
R/W
R/W
1
0
1
0
TC18
LSB
R/W
R/W
OC1OE5
OC1D
0
0
0
0
(PB5)
TCNT1
TC1H
123

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