ATTINY26L-8SU Atmel, ATTINY26L-8SU Datasheet - Page 117

ID MCU AVR 2K 5V 8MHZ 20-SOIC

ATTINY26L-8SU

Manufacturer Part Number
ATTINY26L-8SU
Description
ID MCU AVR 2K 5V 8MHZ 20-SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY26L-8SU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Package
20SOIC
Device Core
AVR
Family Name
ATtiny
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Interface Type
SPI/USI
On-chip Adc
11-chx10-bit
Number Of Timers
2
Cpu Family
ATtiny
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
128Byte
# I/os (max)
16
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
SOIC
Processor Series
ATTINY2x
Core
AVR8
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATTINY26L-8SJ
ATTINY26L-8SJ

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Programming the
Fuse High Bits
Programming the
Lock Bits
Reading the Fuse and
Lock Bits
1477K–AVR–08/10
The algorithm for programming the Fuse high bits is as follows (refer to “Programming the Flash”
on page 113 for details on Command and Data loading):
1. A: Load Command “0100 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.
3. Set BS1 to “1” and BS2 to “0”. This selects high data byte.
4. Give WR a negative pulse and wait for RDY/BSY to go high.
5. Set BS1 to “0”. This selects low data byte.
Figure 62. Programming the Fuse Waveforms
The algorithm for programming the Lock bits is as follows (refer to “Programming the Flash” on
page 113 for details on Command and Data loading):
1. A: Load Command “0010 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs the Lock bit.
3. Give WR a negative pulse and wait for RDY/BSY to go high.
The Lock bits can only be cleared by executing Chip Erase.
The algorithm for reading the Fuse and Lock bits is as follows (refer to “Programming the Flash”
on page 113 for details on Command loading):
1. A: Load Command “0000 0100”.
2. Set OE to “0”, BS2 to “0”, and BS1 to “0”. The status of the Fuse Low bits can now be
3. Set OE to “0”, BS2 to “1”, and BS1 to “1”. The status of the Fuse High bits can now be
4. Set OE to “0”, BS2 to “0”, and BS1 to “1”. The status of the Lock bits can now be read at
5. Set OE to “1”.
read at DATA (“0” means programmed).
read at DATA (“0” means programmed).
DATA (“0” means programmed).
RESET +12V
PAGEL/BS1
RDY/BSY
XA1/BS2
XTAL1
DATA
XA0
WR
OE
$40
A
DATA
C
XX
Write Fuse Low Byte
$40
A
DATA
C
XX
Write Fuse High Byte
117

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