PIC16CE625-20I/P Microchip Technology, PIC16CE625-20I/P Datasheet - Page 53
![IC MCU OTP 2KX14 EE COMP 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16CE625-20I/P
Manufacturer Part Number
PIC16CE625-20I/P
Description
IC MCU OTP 2KX14 EE COMP 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16CE623-04P.pdf
(113 pages)
Specifications of PIC16CE625-20I/P
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
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10.3
The PIC16CE62X differentiates between various kinds
of reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any reset condition.
Their status is unknown on POR and unchanged in any
other reset. Most other registers are reset to a “reset
FIGURE 10-6: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
V
1999 Microchip Technology Inc.
MCLR/
OSC1/
CLKIN
PP
V
Pin
Power-on reset (POR)
MCLR reset during normal operation
MCLR reset during SLEEP
WDT reset (normal operation)
WDT wake-up (SLEEP)
Brown-out Reset (BOD)
DD
Pin
Reset
On-chip
RC OSC
OST/PWRT
Brown-out
V
Module
(1)
detect
WDT
DD
Reset
rise
OST
PWRT
10-bit Ripple-counter
WDT
Reset
10-bit Ripple-counter
Time-out
BODEN
Power-on Reset
External
Reset
SLEEP
Enable PWRT
Enable OST
state” on Power-on reset, MCLR reset, WDT reset and
MCLR reset during SLEEP. They are not affected by a
WDT wake-up, since this is viewed as the resumption
of normal operation. TO and PD bits are set or cleared
differently in different reset situations as indicated in
Table 10-4. These bits are used in software to deter-
mine the nature of the reset. See Table 10-6 for a full
description of reset states of all registers.
A simplified block diagram of the on-chip reset circuit is
shown in Figure 10-6.
The MCLR reset path has a noise filter to detect and
ignore small pulses. See Table 13-5 for pulse width
specification.
See Table 10-3 for time-out situations.
PIC16CE62X
S
R
DS40182C-page 53
Q
Chip_Reset
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