DSPIC30F2012-20I/ML Microchip Technology, DSPIC30F2012-20I/ML Datasheet - Page 197

• Manufacturer Part Number: DSPIC30F2012-20I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2012-20I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F201220IML

INDEX
Numerics
12-bit Analog-to-Digital Converter (A/D) Module .............. 109
A
A/D .................................................................................... 109
AC Characteristics ............................................................ 157
AC Temperature and Voltage Specifications .................... 157
Address Generator Units .................................................... 41
Alternate Vector Table ........................................................ 67
Analog-to-Digital Converter. See A/D.
Assembler
Automatic Clock Stretch...................................................... 96
B
Bandgap Start-up Time
Barrel Shifter ....................................................................... 25
Bit-Reversed Addressing .................................................... 44
Block Diagrams
© 2005 Microchip Technology Inc.
Aborting a Conversion .............................................. 111
ADCHS Register ....................................................... 109
ADCON1 Register..................................................... 109
ADCON2 Register..................................................... 109
ADCON3 Register..................................................... 109
ADCSSL Register ..................................................... 109
ADPCFG Register..................................................... 109
Configuring Analog Port Pins.............................. 58, 113
Connection Considerations....................................... 113
Conversion Operation ............................................... 110
Effects of a Reset...................................................... 112
Operation During CPU Idle Mode ............................. 112
Operation During CPU Sleep Mode.......................... 112
Output Formats ......................................................... 112
Power-down Modes .................................................. 112
Programming the Sample Trigger............................. 111
Register Map............................................................. 115
Result Buffer ............................................................. 110
Sampling Requirements............................................ 111
Selecting the Conversion Clock ................................ 111
Selecting the Conversion Sequence......................... 110
Load Conditions ........................................................ 157
MPASM Assembler................................................... 139
During 10-bit Addressing (STREN = 1)....................... 96
During 7-bit Addressing (STREN = 1)......................... 96
Receive Mode ............................................................. 96
Transmit Mode ............................................................ 96
Requirements............................................................ 165
Timing Characteristics .............................................. 164
Example ...................................................................... 45
Implementation ........................................................... 44
Modifier Values Table ................................................. 45
Sequence Table (16-Entry)......................................... 45
12-bit A/D Functional ................................................ 109
16-bit Timer1 Module .................................................. 71
16-bit Timer2............................................................... 77
16-bit Timer3............................................................... 77
32-bit Timer2/3............................................................ 76
DSP Engine ................................................................ 22
dsPIC30F2011 ............................................................ 10
dsPIC30F2012 ............................................................ 11
dsPIC30F3013 ............................................................ 13
External Power-on Reset Circuit............................... 125
I
Input Capture Mode .................................................... 81
2
C............................................................................... 94
dsPIC30F2011/2012/3012/3013
Preliminary
BOR Characteristics ......................................................... 156
BOR. See Brown-out Reset.
Brown-out Reset
C
C Compilers
CAN Module
CLKOUT and I/O Timing
Code Examples
Code Protection ................................................................ 117
Control Registers ................................................................ 48
Core Architecture
CPU Architecture Overview ................................................ 17
Customer Change Notification Service............................. 201
Customer Notification Service .......................................... 201
Customer Support..................................................... 201, 202
D
Data Accumulators and Adder/Subtractor .......................... 23
Data Address Space........................................................... 33
Data EEPROM Memory...................................................... 53
Oscillator System...................................................... 119
Output Compare Mode ............................................... 85
Reset System ........................................................... 123
Shared Port Structure................................................. 57
SPI.............................................................................. 89
SPI Master/Slave Connection..................................... 90
UART Receiver......................................................... 102
UART Transmitter..................................................... 101
Characteristics.......................................................... 155
Timing Requirements ............................................... 164
MPLAB C17.............................................................. 140
MPLAB C18.............................................................. 140
MPLAB C30.............................................................. 140
I/O Timing Characteristics ........................................ 182
I/O Timing Requirements.......................................... 182
Characteristics.......................................................... 162
Requirements ........................................................... 162
Data EEPROM Block Erase ....................................... 54
Data EEPROM Block Write ........................................ 56
Data EEPROM Read.................................................. 53
Data EEPROM Word Erase ....................................... 54
Data EEPROM Word Write ........................................ 55
Erasing a Row of Program Memory ........................... 49
Initiating a Programming Sequence ........................... 50
Loading Write Latches................................................ 50
NVMADR .................................................................... 48
NVMADRU ................................................................. 48
NVMCON.................................................................... 48
NVMKEY .................................................................... 48
Overview..................................................................... 17
Data Space Write Saturation ...................................... 25
Overflow and Saturation ............................................. 23
Round Logic ............................................................... 24
Write Back .................................................................. 24
Alignment.................................................................... 36
Alignment (Figure) ...................................................... 36
Effect of Invalid Memory Accesses (Table) ................ 36
MCU and DSP (MAC Class) Instructions Example .... 35
Memory Map......................................................... 33, 34
Near Data Space ........................................................ 37
Software Stack ........................................................... 37
Spaces........................................................................ 36
Width .......................................................................... 36
Erasing ....................................................................... 54
Erasing, Block............................................................. 54
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