PIC16F886-I/SP Microchip Technology, PIC16F886-I/SP Datasheet - Page 33
![IC PIC MCU FLASH 8KX14 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16F886-I/SP
Manufacturer Part Number
PIC16F886-I/SP
Description
IC PIC MCU FLASH 8KX14 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
5.PIC16F883-ISO.pdf
(288 pages)
Specifications of PIC16F886-I/SP
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP/EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM164123 - KIT MANAGEMENT SYSTEM PICDEMDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F886-I/SP
Manufacturer:
NXP
Quantity:
2 400
- PIC16F616T-ISL PDF datasheet
- MCP1631RD-MCC2 PDF datasheet #2
- PIC16F882-ISS PDF datasheet #3
- PIC16F882-ISS PDF datasheet #4
- PIC16F883-ISO PDF datasheet #5
- Current page: 33 of 288
- Download datasheet (5Mb)
2.2.2.3
The INTCON register, shown in Register 2-3, is a
readable and writable register, which contains the various
enable and flag bits for TMR0 register overflow, PORTB
change and external INT pin interrupts.
REGISTER 2-3:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
GIE
2:
3:
IOCB register must also be enabled.
T0IF bit is set when Timer0 rolls over. Timer0 is unchanged on Reset and should be initialized before
clearing T0IF bit.
Includes ULPWU interrupt.
INTCON Register
GIE: Global Interrupt Enable bit
1 = Enables all unmasked interrupts
0 = Disables all interrupts
PEIE: Peripheral Interrupt Enable bit
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
T0IE: Timer0 Overflow Interrupt Enable bit
1 = Enables the Timer0 interrupt
0 = Disables the Timer0 interrupt
INTE: INT External Interrupt Enable bit
1 = Enables the INT external interrupt
0 = Disables the INT external interrupt
RBIE: PORTB Change Interrupt Enable bit
1 = Enables the PORTB change interrupt
0 = Disables the PORTB change interrupt
T0IF: Timer0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: INT External Interrupt Flag bit
1 = The INT external interrupt occurred (must be cleared in software)
0 = The INT external interrupt did not occur
RBIF: PORTB Change Interrupt Flag bit
1 = When at least one of the PORTB general purpose I/O pins changed state (must be cleared in
0 = None of the PORTB general purpose I/O pins have changed state
R/W-0
PEIE
software)
INTCON: INTERRUPT CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
R/W-0
T0IE
PIC16F882/883/884/886/887
R/W-0
INTE
Preliminary
(2)
(1,3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RBIE
R/W-0
Note:
(1,3)
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE of the INTCON register.
User
appropriate interrupt flag bits are clear
prior to enabling an interrupt.
T0IF
R/W-0
(2)
software
x = Bit is unknown
R/W-0
INTF
should
DS41291D-page 31
ensure
R/W-x
RBIF
bit 0
the
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